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"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8951
-- gerrit
commit b2e2bc8bcbb04e008b4827fd16f80c17319c1d28
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date: Sat Jun 14 14:51:43 2025 +0200
target: sort the targets by alphabetic order
Add comments to require the list of targets to be kept sorted.
Change-Id: Ie3d7e3f5d55a9f9214dc179c5c986b6682f59412
Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>
diff --git a/src/target/target.c b/src/target/target.c
index fd0e0116b5..8bf654a272 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -71,44 +71,45 @@ static int target_gdb_fileio_end_default(struct target
*target, int retcode,
int fileio_errno, bool ctrl_c);
static struct target_type *target_types[] = {
+ // Keep in alphabetic order this list of targets
+ &aarch64_target,
+ &arcv2_target,
+ &arm11_target,
+ &arm720t_target,
&arm7tdmi_target,
- &arm9tdmi_target,
&arm920t_target,
- &arm720t_target,
- &arm966e_target,
- &arm946e_target,
&arm926ejs_target,
- &fa526_target,
- &feroceon_target,
- &dragonite_target,
- &xscale_target,
- &xtensa_chip_target,
- &cortexm_target,
+ &arm946e_target,
+ &arm966e_target,
+ &arm9tdmi_target,
+ &armv8r_target,
+ &avr32_ap7k_target,
+ &avr_target,
&cortexa_target,
+ &cortexm_target,
&cortexr4_target,
- &arm11_target,
- &ls1_sap_target,
- &mips_m4k_target,
- &avr_target,
+ &dragonite_target,
&dsp563xx_target,
&dsp5680xx_target,
- &testee_target,
- &avr32_ap7k_target,
- &hla_target,
- &esp32_target,
+ &esirisc_target,
&esp32s2_target,
&esp32s3_target,
+ &esp32_target,
+ &fa526_target,
+ &feroceon_target,
+ &hla_target,
+ &ls1_sap_target,
+ &mem_ap_target,
+ &mips_m4k_target,
+ &mips_mips64_target,
&or1k_target,
- &quark_x10xx_target,
&quark_d20xx_target,
- &stm8_target,
+ &quark_x10xx_target,
&riscv_target,
- &mem_ap_target,
- &esirisc_target,
- &arcv2_target,
- &aarch64_target,
- &armv8r_target,
- &mips_mips64_target,
+ &stm8_target,
+ &testee_target,
+ &xscale_target,
+ &xtensa_chip_target,
NULL,
};
diff --git a/src/target/target_type.h b/src/target/target_type.h
index 5b0dc5a6c0..a146fab763 100644
--- a/src/target/target_type.h
+++ b/src/target/target_type.h
@@ -307,6 +307,7 @@ struct target_type {
unsigned int (*data_bits)(struct target *target);
};
+// Keep in alphabetic order this list of targets
extern struct target_type aarch64_target;
extern struct target_type arcv2_target;
extern struct target_type arm11_target;
--
