[PATCH]: baae57625a flash/nor/rp2xxx: save security state over target algo

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8960

-- gerrit

commit baae57625afd9410204ab2ab338849230e650106
Author: Tomas Vanek <van...@fbl.cz>
Date:   Wed Jun 18 09:44:03 2025 +0200

    flash/nor/rp2xxx: save security state over target algo
    
    RP2040 and RP2350 flash driver runs a ROM API target algorithm
    in probe to setup QSPI command interface. The Cortex-M33 core
    of RP2350 has to be in secure mode with SAU and MPU switched off
    to ensure ROM API call working properly.
    
    Especially after the flash probe (used in gdb-attach event)
    we need to completely restore the original security state to allow
    'resume' or gdb 'continue' without injecting strange errors
    to application code.
    
    Use cortex_m support to set secure mode and to restore it back.
    
    Fixes: commit ea775d49fc71 ("flash/nor/rp2040: add RP2350 support")
    Change-Id: I72096bfecbb45a8aa4d3a7a37ad140532b3b00b2
    Signed-off-by: Tomas Vanek <van...@fbl.cz>

diff --git a/src/flash/nor/rp2xxx.c b/src/flash/nor/rp2xxx.c
index 85c5911041..fa13ec527f 100644
--- a/src/flash/nor/rp2xxx.c
+++ b/src/flash/nor/rp2xxx.c
@@ -209,6 +209,8 @@ struct rp2xxx_flash_bank {
        bool size_override;
        struct flash_device spi_dev;            /* detected model of SPI flash 
*/
        unsigned int sfdp_dummy, sfdp_dummy_detect;
+
+       struct cortex_m_saved_security saved_security;
 };
 
 #ifndef LOG_ROM_SYMBOL_DEBUG
@@ -630,23 +632,12 @@ static int rp2350_init_arm_core0(struct target *target, 
struct rp2xxx_flash_bank
        // run in the Secure state, so flip the state now before attempting to
        // execute any code on the core.
        int retval;
-       uint32_t dscsr;
-       retval = target_read_u32(target, DCB_DSCSR, &dscsr);
+       retval = cortex_m_set_secure(target, &priv->saved_security);
        if (retval != ERROR_OK) {
-               LOG_ERROR("RP2350 init ARM core: DSCSR read failed");
+               LOG_ERROR("RP2350 init ARM core: set secure mode failed");
                return retval;
        }
 
-       LOG_DEBUG("DSCSR: 0x%08" PRIx32, dscsr);
-       if (!(dscsr & DSCSR_CDS)) {
-               LOG_DEBUG("Setting Current Domain Secure in DSCSR");
-               retval = target_write_u32(target, DCB_DSCSR, (dscsr & 
~DSCSR_CDSKEY) | DSCSR_CDS);
-               if (retval != ERROR_OK) {
-                       LOG_ERROR("RP2350 init ARM core: DSCSR read failed");
-                       return retval;
-               }
-       }
-
        if (!priv->stack) {
                LOG_ERROR("No stack for flash programming code");
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
@@ -840,6 +831,15 @@ static void cleanup_after_raw_flash_cmd(struct target 
*target, struct rp2xxx_fla
           driver state. Best to clean up our allocations manually after
           completing each flash call, so we know to make fresh ones next time. 
*/
        LOG_DEBUG("Cleaning up after flash operations");
+
+       if (IS_RP2350(priv->id)) {
+               /* TODO: restore ACCESSCTRL */
+               if (is_arm(target_to_arm(target))) {
+                       int retval = cortex_m_security_restore(target, 
&priv->saved_security);
+                       if (retval != ERROR_OK)
+                               LOG_WARNING("RP2xxx: security state was not 
restored properly. Debug 'resume' will probably fail, use 'reset' instead");
+               }
+       }
        if (priv->stack) {
                target_free_working_area(target, priv->stack);
                priv->stack = 0;

--