[PATCH]: 0d6846113b tcl/target/max32690: Add max32690 support

[gerrit]

This is an automated email from Gerrit.

"Henrik Mau <henrik....@analog.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/8977

-- gerrit

commit 0d6846113b671cb29eac8a1d085a5a9ca15c6a91
Author: Henrik Mau <henrik....@analog.com>
Date:   Mon Jun 30 11:32:44 2025 +0100

    tcl/target/max32690: Add max32690 support
    
    Add configuration file for max32690
    
    Change-Id: I30d90da176f85feba8369c96e1a0bb82a39eca5f
    Signed-off-by: Henrik Mau <henrik....@analog.com>

diff --git a/tcl/target/max32690.cfg b/tcl/target/max32690.cfg
new file mode 100644
index 0000000000..588ebe7e39
--- /dev/null
+++ b/tcl/target/max32690.cfg
@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Maxim Integrated MAX32690 OpenOCD target configuration file
+
+# Set the reset pin configuration
+reset_config srst_only
+adapter srst delay 2
+adapter srst pulse_width 2
+
+# Set flash parameters
+set FLASH_BASE 0x10000000
+set FLASH_SIZE 0x300000
+set FLC_BASE 0x40029000
+set FLASH_SECTOR 0x4000
+set FLASH_CLK 60
+set FLASH_OPTIONS 0x01
+
+# Use Serial Wire Debug
+transport select swd
+
+source [find target/max32xxx.cfg]
+
+# Add additional flash bank
+set FLASH_BASE 0x10300000
+set FLASH_SIZE 0x40000
+set FLC_BASE 0x40029400
+set FLASH_SECTOR 0x2000
+
+flash bank $_CHIPNAME.flash1 max32xxx $FLASH_BASE $FLASH_SIZE 0 0 
$_CHIPNAME.cpu \
+$FLC_BASE $FLASH_SECTOR $FLASH_CLK $FLASH_OPTIONS
+
+global rom_bp_enabled
+set rom_bp_enabled "no"
+
+# Override default init_reset{mode} to catch parameter "mode"
+proc init_reset {mode} {
+       global sp_reset_mode
+       set sp_reset_mode $mode
+}
+
+$_CHIPNAME.cpu configure -event reset-deassert-post {
+  global sp_reset_mode
+  global _CHIPNAME
+
+       if { ([string compare $sp_reset_mode "init"] == 0) } {
+    set state "reset"
+    while { [string compare $state "reset"] == 0 } {
+      set state [$_CHIPNAME.cpu curstate]
+      $_CHIPNAME.cpu arp_poll
+      }
+    $_CHIPNAME.cpu arp_halt
+  }
+}
+
+$_CHIPNAME.cpu configure -event reset-assert-pre {
+  global sp_reset_mode
+  global rom_bp_enabled
+
+  if { (([string compare $sp_reset_mode "halt"] == 0) || ([string compare 
$sp_reset_mode "init"] == 0)) } {
+    halt
+       if { ([string compare $rom_bp_enabled "yes"] == 0) } {
+      rbp 0x0000FFF4
+      }
+    bp 0x0000FFF4 2 hw
+    set rom_bp_enabled "yes"
+  }
+}
+
+$_CHIPNAME.cpu configure -event halted {
+  global sp_reset_mode
+  global rom_bp_enabled
+
+       if { ([string compare $rom_bp_enabled "yes"] == 0) } {
+    rbp 0x0000FFF4
+    set rom_bp_enabled "no"
+  }
+  set sp_reset_mode none
+}

--