This is an automated email from Gerrit. "Jérôme Pouiller <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9449
-- gerrit commit ed33008b2cc75f389d0eef81a5b16a0c1001e450 Author: Jérôme Pouiller <[email protected]> Date: Wed Feb 4 13:57:35 2026 +0100 flash/nor/efm32: Support alternative flashbase address Silicon Labs Series-2 chips don't start the flash at the same address. Co-developed-by: Peter Johanson <[email protected]> Signed-off-by: Peter Johanson <[email protected]> Signed-off-by: Jérôme Pouiller <[email protected]> Change-Id: I586e6b0e26de141db298dbb9329413642cb8a840 diff --git a/jimtcl b/jimtcl index a77ef1a621..f160866171 160000 --- a/jimtcl +++ b/jimtcl @@ -1 +1 @@ -Subproject commit a77ef1a6218fad4c928ddbdc03c1aedc41007e70 +Subproject commit f160866171457474f7c4d6ccda70f9b77524407e diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 3d72ecc67f..864d6de553 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -30,7 +30,8 @@ #include <target/armv7m.h> #include <target/cortex_m.h> -#define EFM32_FLASH_BASE 0 +#define EFM32_FLASH_BASE_V1 0x00000000 +#define EFM32_FLASH_BASE_V2 0x08000000 /* size in bytes, not words; must fit all Gecko devices */ #define LOCKWORDS_SZ 512 @@ -98,6 +99,9 @@ static const struct efm32_dev_info_addr efm32_dev_info_addr[] = { #define EFM32_MSC_STATUS_ERASEABORTED_MASK 0x0020 #define EFM32_MSC_LOCK_LOCKKEY 0x1b71 + + + /* Series 2 only */ #define EFM32_CMU_REG_CLKEN1_SET 0x50009068 @@ -111,7 +115,8 @@ enum efm32_bank_index { static int efm32_get_bank_index(target_addr_t base) { switch (base) { - case EFM32_FLASH_BASE: + case EFM32_FLASH_BASE_V1: + case EFM32_FLASH_BASE_V2: return EFM32_BANK_INDEX_MAIN; case EFM32_MSC_USER_DATA: return EFM32_BANK_INDEX_USER_DATA; @@ -734,7 +739,8 @@ static int efm32_get_page_lock(struct flash_bank *bank, size_t page) uint32_t mask = 0; switch (bank->base) { - case EFM32_FLASH_BASE: + case EFM32_FLASH_BASE_V1: + case EFM32_FLASH_BASE_V2: dw = efm32_info->lb_page[page >> 5]; mask = BIT(page & 0x1f); break; @@ -757,7 +763,8 @@ static int efm32_set_page_lock(struct flash_bank *bank, size_t page, int set) uint32_t *dw = &efm32_info->lb_page[page >> 5]; uint32_t mask = BIT(page & 0x1f); - if (bank->base != EFM32_FLASH_BASE) { + if (bank->base != EFM32_FLASH_BASE_V1 && + bank->base != EFM32_FLASH_BASE_V2) { LOG_ERROR("Locking user and lockbits pages is not supported yet"); return ERROR_FAIL; } @@ -1156,6 +1163,7 @@ static int efm32_probe(struct flash_bank *bank) { struct efm32_flash_chip *efm32_info = bank->driver_priv; struct efm32_info *efm32_mcu_info = &efm32_info->info; + uint32_t base_address = EFM32_FLASH_BASE_V2; int bank_index = efm32_get_bank_index(bank->base); char strbuf[256]; int ret; @@ -1169,6 +1177,12 @@ static int efm32_probe(struct flash_bank *bank) if (ret != ERROR_OK) return ret; + if (efm32_mcu_info->family_data->series == 0 || + efm32_mcu_info->family_data->series == 1 || + FIELD_GET(EFM32_DI_PARTINFO_FAMILY_MASK, efm32_mcu_info->part_info) == 21 || + FIELD_GET(EFM32_DI_PARTINFO_FAMILY_MASK, efm32_mcu_info->part_info) == 22) + base_address = EFM32_FLASH_BASE_V1; + LOG_INFO("detected part: %s", efm32_get_str_identifier(efm32_mcu_info, strbuf, sizeof(strbuf))); LOG_INFO("flash size = %d KiB", efm32_mcu_info->flash_sz_kib); @@ -1181,7 +1195,7 @@ static int efm32_probe(struct flash_bank *bank) efm32_mcs_clock_enable(bank); - if (bank->base == EFM32_FLASH_BASE) { + if (bank->base == base_address) { bank->num_sectors = efm32_mcu_info->flash_sz_kib * 1024 / efm32_mcu_info->page_size; assert(bank->num_sectors > 0); --
