This is an automated email from Gerrit. "Sameer Srivastava <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9525
-- gerrit commit cb28a05c91e73629d2888ad8af6c30bde05dc69c Author: Sameer Srivastava <[email protected]> Date: Sun Mar 8 12:10:37 2026 +0530 tcl: added am13e230x target and launchpad cfg - target defines SRAM work area and flash region - board selects xds110 interface and speed Signed-off-by: Sameer Srivastava <[email protected]> Change-Id: I6cb9f52867a1a64895d9ff81f0c38b228578fc1a diff --git a/tcl/board/ti/am13e230x-launchpad.cfg b/tcl/board/ti/am13e230x-launchpad.cfg new file mode 100644 index 0000000000..2ca32ceaa8 --- /dev/null +++ b/tcl/board/ti/am13e230x-launchpad.cfg @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ +# + +source [find interface/xds110.cfg] +adapter speed 10000 +source [find target/ti/am13e230x.cfg] +init +reset halt diff --git a/tcl/target/ti/am13e230x.cfg b/tcl/target/ti/am13e230x.cfg new file mode 100644 index 0000000000..4bf0b608ff --- /dev/null +++ b/tcl/target/ti/am13e230x.cfg @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# Copyright (C) 2026 Texas Instruments Incorporated - https://www.ti.com/ +# +# Texas Instruments AM13E230X - ARM Cortex-M33 @ 200MHz +# + +source [find bitsbytes.tcl] + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME AM13E230X +} + +if { [info exists CPUTAPID] } { + set _DAP_TAPID $CPUTAPID +} else { + set _DAP_TAPID 0x6ba00477 +} + +transport select jtag + +set _DAP_ID $_DAP_TAPID + +jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_DAP_TAPID + +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap + +if { [info exists WORKAREABASE] } { + set _WORKAREABASE $WORKAREABASE +} else { + set _WORKAREABASE 0x20000000 +} +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x18000 +} + +$_TARGETNAME configure -work-area-phys $_WORKAREABASE -work-area-size $_WORKAREASIZE -work-area-backup 0 + +set _FLASHNAME $_CHIPNAME.flash +flash bank $_FLASHNAME.main am13 0x00000000 0 0 0 $_TARGETNAME +flash bank $_FLASHNAME.nonmain am13 0x60100000 0 0 0 $_TARGETNAME + +if {![using_hla]} { + cortex_m reset_config sysresetreq +} --
