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"Tomas Vanek <[email protected]>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/9588

-- gerrit

commit d56698ae0d208de8c50aa9b0d9f56a409a372ae4
Author: Tomas Vanek <[email protected]>
Date:   Mon Oct 27 12:55:26 2025 +0100

    tcl/target/rp2350: hide and expose CSR registers
    
    Hide CSRs not implemented on Hazard3 RISC-V cores.
    Expose implemented CSRs not exposed by default.
    
    The customization helps little bit in making 'reg' list somewhat shorter,
    prevents lot of OpenOCD errors like
        Error: RTOS: failed to get register 3667
    and gdb errors like
        Could not fetch register "hgeip"; remote failure reply '0E'
    
    Change-Id: I78b90e727b901eb012e3fe9b6d2cf7912e5dfe02
    Signed-off-by: Tomas Vanek <[email protected]>

diff --git a/tcl/target/rp2350.cfg b/tcl/target/rp2350.cfg
index afa16261c4..27233b88fb 100644
--- a/tcl/target/rp2350.cfg
+++ b/tcl/target/rp2350.cfg
@@ -96,9 +96,24 @@ if { [info exists _TARGETNAME_CM0] } {
        $_TARGETNAME_CM0 configure -event reset-init { rp2xxx rom_api_call FC }
 }
 
+proc rv_config { __TARGETNAME } {
+       $__TARGETNAME riscv virt2phys_mode off
+       $__TARGETNAME riscv hide_csrs 7 0x15 0x17 0x45-0x49
+       $__TARGETNAME riscv hide_csrs 0x102 0x103 0x107 0x10a-0x10f
+       $__TARGETNAME riscv hide_csrs 0x145-0x149 0x14d 0x15d
+       $__TARGETNAME riscv hide_csrs 0x200-0x280 0x307 0x30c-0x30f 0x31c-0x31f
+       $__TARGETNAME riscv hide_csrs 0x323-0x33f 0x345-0x34a 0x34b 0x3a4-0x3af
+       $__TARGETNAME riscv hide_csrs 0x3c0-0x79f 0x7a3 0x7a8 0x7aa 0x7b2 0x7b3
+       $__TARGETNAME riscv hide_csrs 0xb03-0xb1f 0xb83-0xb9f
+       $__TARGETNAME riscv expose_csrs 0xbe0=meiea 0xbe1=meipa 0xbe2=meifa
+       $__TARGETNAME riscv expose_csrs 0xbe3=meipra 0xbe4=meinext 
0xbe5=meicontext
+       $__TARGETNAME riscv expose_csrs 0xbf0=msleep
+       $__TARGETNAME riscv hide_csrs 0xc01 0xc03-0xc1f 0xc81 0xc83-0xc9f 0xda0 
0xe12
+}
+
 if { [info exists _TARGETNAME_RV0] } {
        target create $_TARGETNAME_RV0 riscv -dap $_CHIPNAME.dap -ap-num 0xa000 
-coreid 0
-       $_TARGETNAME_RV0 riscv virt2phys_mode off
+       rv_config $_TARGETNAME_RV0
 
        $_TARGETNAME_RV0 configure -event reset-init "_rv_reset_init"
 
@@ -115,7 +130,7 @@ if { [info exists _TARGETNAME_CM1] } {
 
 if { [info exists _TARGETNAME_RV1] } {
        target create $_TARGETNAME_RV1 riscv -dap $_CHIPNAME.dap -ap-num 0xa000 
-coreid 1
-       $_TARGETNAME_RV1 riscv virt2phys_mode off
+       rv_config $_TARGETNAME_RV1
 }
 
 if { [info exists USE_SMP] } {

-- 

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