On Wed, Jan 14, 2009 at 2:13 PM, Alan Carvalho de Assis <acas...@gmail.com> wrote: > I don't have a functional state to create a patch, but it appears to > work a little better now. The "reg" command is returning values which > make sense instead all 0 as before.
We won't get a functional version immediately. We should however commit changes that move us in the right direction. I committed another change too(attached)... It looks a bit healither... I changed the error into a warning. Can the funky JTAG device without IDCODE fail to validate without it actually being a problem? What I need next are some *simple* .elf binaries that can be committed to svn as test cases for simple GDB debugging. See openocd/testing/examples folder. I can help out w/openocd specific stuff, but I can't dive into imx31 datasheets/compilers, etc. at this point. I tried single stepping but without a working application I can upload, I wouldn't expect it to work(PC doesn't change). Resume seems to work better(i.e. PC changes). -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer
### Eclipse Workspace Patch 1.0 #P openocd Index: src/jtag/jtag.c =================================================================== --- src/jtag/jtag.c (revision 1316) +++ src/jtag/jtag.c (working copy) @@ -40,6 +40,7 @@ */ int jtag_error=ERROR_OK; + typedef struct cmd_queue_page_s { void *address; @@ -1698,17 +1699,18 @@ tap = NULL; chain_pos = 0; + int val; for(;;){ tap = jtag_NextEnabledTap(tap); if( tap == NULL ){ break; } - - if (buf_get_u32(ir_test, chain_pos, 2) != 0x1) + val = buf_get_u32(ir_test, chain_pos, 2); + if (val != 0x1) { char *cbuf = buf_to_str(ir_test, total_ir_length, 16); - LOG_ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf); + LOG_ERROR("Could not validate JTAG scan chain, IR mismatch, scan returned 0x%s. pos %d expected 0x3 got %0x", cbuf, chain_pos, val); free(cbuf); free(ir_test); return ERROR_JTAG_INIT_FAILED; @@ -1716,10 +1718,11 @@ chain_pos += tap->ir_length; } - if (buf_get_u32(ir_test, chain_pos, 2) != 0x3) + val = buf_get_u32(ir_test, chain_pos, 2); + if (val != 0x3) { char *cbuf = buf_to_str(ir_test, total_ir_length, 16); - LOG_ERROR("Error validating JTAG scan chain, IR mismatch, scan returned 0x%s", cbuf); + LOG_ERROR("Could not validate JTAG scan chain, IR mismatch, scan returned 0x%s. pos %d expected 0x3 got %0x", cbuf, chain_pos, val); free(cbuf); free(ir_test); return ERROR_JTAG_INIT_FAILED; @@ -2249,7 +2252,7 @@ if (jtag_validate_chain() != ERROR_OK) { - LOG_ERROR("Could not validate JTAG chain, continuing anyway..."); + LOG_WARNING("Could not validate JTAG chain, continuing anyway..."); } return ERROR_OK; @@ -2953,6 +2956,7 @@ } } + /* map state number to SVF state string */ const char* jtag_state_name(enum tap_state state) { @@ -2981,3 +2985,4 @@ return ret; } + Index: src/target/target/imx31.cfg =================================================================== --- src/target/target/imx31.cfg (revision 1316) +++ src/target/target/imx31.cfg (working copy) @@ -45,14 +45,14 @@ # SDMA_BYPASS - disables SDMA - # # Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register -jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID +jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID # No IDCODE for this TAP jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected-id 0x0 # Per section 40.17.1, table 40-85 the IR register is 4 bits # But this conflicts with Diagram 6-13, "3bits ir and drs" -jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0xf -expected-id $_SDMATAPID +jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID set _TARGETNAME [format "%s.cpu" $_CHIPNAME] target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
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