I'm committing the removal of the obsolete stuff to
the mrcmcr branch as well. This will demonstrate that we end
up with *less* code than we started with.
Consider arm11 support for mrc/mcr before & after...
I can't retire the old commands until the new ones are tested
on real hardware though.
--
Øyvind Harboe
http://www.zylin.com/zy1000.html
ARM7 ARM9 ARM11 XScale Cortex
JTAG debugger and flash programmer
From 6ce4bca650f16271142bebd150d4dd46b168229b Mon Sep 17 00:00:00 2001
From: =?utf-8?q?=C3=98yvind=20Harboe?= <oyvind.har...@zylin.com>
Date: Mon, 26 Oct 2009 14:39:32 +0100
Subject: [PATCH] Added mrc/mcr support to arm11 code.
---
TODO | 2 +-
src/target/arm11.c | 53 ++++++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/TODO b/TODO
index 11318a9..8713e81 100644
--- a/TODO
+++ b/TODO
@@ -143,7 +143,7 @@ Once the above are completed:
- regression: "reset halt" between 729(works) and 788(fails): @par
https://lists.berlios.de/pipermail/openocd-development/2009-July/009206.html
- mcr/mrc target->type support
- - missing from ARM11, ARM920t, ARM966e, XScale.
+ - missing from ARM920t, ARM966e, XScale.
It's possible that the current syntax is unable to support read-modify-write
operations(see arm966e).
- mcr/mrc - retire cp15 commands when there the mrc/mrc commands have been
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 289d64c..35afa48 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -60,6 +60,10 @@ bool arm11_config_hardware_step = false;
#define ARM11_HANDLER(x) \
.x = arm11_##x
+
+static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+
target_type_t arm11_target =
{
.name = "arm11",
@@ -98,6 +102,9 @@ target_type_t arm11_target =
ARM11_HANDLER(init_target),
ARM11_HANDLER(examine),
ARM11_HANDLER(quit),
+ .mrc = arm11_mrc,
+ .mcr = arm11_mcr,
+
};
int arm11_regs_arch_type = -1;
@@ -2198,6 +2205,52 @@ int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args,
return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
}
+static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read)
+{
+ int retval;
+ arm11_common_t * arm11 = target->arch_info;
+
+ uint32_t instr = 0xEE000010 |
+ (cpnum << 8) |
+ (op1 << 21) |
+ (CRn << 16) |
+ (CRm << 0) |
+ (op2 << 5);
+
+ if (read)
+ instr |= 0x00100000;
+
+ retval = arm11_run_instr_data_prepare(arm11);
+ if (retval != ERROR_OK)
+ return retval;
+
+ if (read)
+ {
+ retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, value);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+ else
+ {
+ retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, *value);
+ if (retval != ERROR_OK)
+ return retval;
+ }
+
+ return arm11_run_instr_data_finish(arm11);
+}
+
+static int arm11_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+{
+ return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, value, true);
+}
+
+static int arm11_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+{
+ return arm11_mrc_inner(target, cpnum, op1, op2, CRn, CRm, &value, false);
+}
+
+
int arm11_register_commands(struct command_context_s *cmd_ctx)
{
FNC_INFO;
--
1.6.0.4
From f09d5eeb3ed2b0ec2048d5c4dccff5acb06dbf1c Mon Sep 17 00:00:00 2001
From: =?utf-8?q?=C3=98yvind=20Harboe?= <oyvind.har...@zylin.com>
Date: Mon, 26 Oct 2009 14:42:18 +0100
Subject: [PATCH] Retire obsolete mrc/mcr commands.
---
doc/openocd.texi | 20 +----------
src/target/arm11.c | 99 ----------------------------------------------------
2 files changed, 1 insertions(+), 118 deletions(-)
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 1328f77..b802708 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -1497,7 +1497,7 @@ proc setc15 @{regs va...@} @{
echo [format "set p15 0x%04x, 0x%08x" $regs $value]
- arm11 mcr $TARGETNAME 15 [expr ($regs>>12)&0x7] \
+ mcr 15 [expr ($regs>>12)&0x7] \
[expr ($regs>>0)&0xf] [expr ($regs>>4)&0xf] \
[expr ($regs>>8)&0x7] $value
@}
@@ -5682,15 +5682,6 @@ Without arguments, the current settings are displayed.
@subsection ARM11 specific commands
@cindex ARM11
-...@deffn Command {arm11 mcr} pX opc1 CRn CRm opc2 value
-Write @var{value} to a coprocessor @var{pX} register
-passing parameters @var{CRn},
-...@var{crm}, opcodes @var{opc1} and @var{opc2},
-and the MCR instruction.
-(The difference beween this and the MCR2 instruction is
-one bit in the encoding, effecively a fifth parameter.)
-...@end deffn
-
@deffn Command {arm11 memwrite burst} [value]
Displays the value of the memwrite burst-enable flag,
which is enabled by default. Burst writes are only used
@@ -5707,15 +5698,6 @@ which is enabled by default.
If @var{value} is defined, first assigns that.
@end deffn
-...@deffn Command {arm11 mrc} pX opc1 CRn CRm opc2
-Read a coprocessor @var{pX} register passing parameters @var{CRn},
-...@var{crm}, opcodes @var{opc1} and @var{opc2},
-and the MRC instruction.
-(The difference beween this and the MRC2 instruction is
-one bit in the encoding, effecively a fifth parameter.)
-Displays the result.
-...@end deffn
-
@deffn Command {arm11 step_irq_enable} [value]
Displays the value of the flag controlling whether
IRQs are enabled during single stepping;
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 35afa48..0f4dc5e 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -2113,98 +2113,6 @@ arm11_common_t * arm11_find_target(const char * arg)
return 0;
}
-int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, bool read)
-{
- int retval;
-
- if (argc != (read ? 6 : 7))
- {
- LOG_ERROR("Invalid number of arguments.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- arm11_common_t * arm11 = arm11_find_target(args[0]);
-
- if (!arm11)
- {
- LOG_ERROR("Parameter 1 is not a the JTAG chain position of an ARM11 device.");
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
-
- if (arm11->target->state != TARGET_HALTED)
- {
- LOG_WARNING("target was not halted");
- return ERROR_TARGET_NOT_HALTED;
- }
-
- uint32_t values[6];
-
- for (size_t i = 0; i < (read ? 5 : 6); i++)
- {
- values[i] = strtoul(args[i + 1], NULL, 0);
-
- if (values[i] > arm11_coproc_instruction_limits[i])
- {
- LOG_ERROR("Parameter %ld out of bounds (%" PRId32 " max).",
- (long)(i + 2),
- arm11_coproc_instruction_limits[i]);
- return ERROR_COMMAND_SYNTAX_ERROR;
- }
- }
-
- uint32_t instr = 0xEE000010 |
- (values[0] << 8) |
- (values[1] << 21) |
- (values[2] << 16) |
- (values[3] << 0) |
- (values[4] << 5);
-
- if (read)
- instr |= 0x00100000;
-
- retval = arm11_run_instr_data_prepare(arm11);
- if (retval != ERROR_OK)
- return retval;
-
- if (read)
- {
- uint32_t result;
- retval = arm11_run_instr_data_from_core_via_r0(arm11, instr, &result);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("MRC p%d, %d, R0, c%d, c%d, %d = 0x%08" PRIx32 " (%" PRId32 ")",
- (int)(values[0]),
- (int)(values[1]),
- (int)(values[2]),
- (int)(values[3]),
- (int)(values[4]), result, result);
- }
- else
- {
- retval = arm11_run_instr_data_to_core_via_r0(arm11, instr, values[5]);
- if (retval != ERROR_OK)
- return retval;
-
- LOG_INFO("MRC p%d, %d, R0 (#0x%08" PRIx32 "), c%d, c%d, %d",
- (int)(values[0]), (int)(values[1]),
- values[5],
- (int)(values[2]), (int)(values[3]), (int)(values[4]));
- }
-
- return arm11_run_instr_data_finish(arm11);
-}
-
-int arm11_handle_mrc(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
- return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, true);
-}
-
-int arm11_handle_mcr(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
-{
- return arm11_handle_mrc_mcr(cmd_ctx, cmd, args, argc, false);
-}
-
static int arm11_mrc_inner(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value, bool read)
{
int retval;
@@ -2269,10 +2177,6 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
"DEBUG ONLY - Hardware single stepping"
" (default: disabled)");
- register_command(cmd_ctx, top_cmd, "mcr",
- arm11_handle_mcr, COMMAND_ANY,
- "Write Coprocessor register. mcr <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2> <32bit value to write>. All parameters are numbers only.");
-
mw_cmd = register_command(cmd_ctx, top_cmd, "memwrite",
NULL, COMMAND_ANY, NULL);
register_command(cmd_ctx, mw_cmd, "burst",
@@ -2284,9 +2188,6 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
"Terminate program if transfer error was found"
" (default: enabled)");
- register_command(cmd_ctx, top_cmd, "mrc",
- arm11_handle_mrc, COMMAND_ANY,
- "Read Coprocessor register. mrc <jtag_target> <coprocessor> <opcode 1> <CRn> <CRm> <opcode 2>. All parameters are numbers only.");
register_command(cmd_ctx, top_cmd, "step_irq_enable",
arm11_handle_bool_step_irq_enable, COMMAND_ANY,
"Enable interrupts while stepping"
--
1.6.0.4
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