This patch adds a ssb ehci driver as well as support for ssb multifunction cores.

It is needed to use the ehci function in the BCM5354's USB2 core.

See https://dev.openwrt.org/ticket/3365 and
http://forum.openwrt.org/viewtopic.php?id=15106&p=2 for reports of independent testing.

Signed-off-by: Steve Brown <[EMAIL PROTECTED]>


diff --git a/target/linux/brcm47xx/config-2.6.23 b/target/linux/brcm47xx/config-2.6.23
index 41b440b..92247db 100644
--- a/target/linux/brcm47xx/config-2.6.23
+++ b/target/linux/brcm47xx/config-2.6.23
@@ -220,6 +220,8 @@ CONFIG_TRAD_SIGNALS=y
 CONFIG_USB=m
 # CONFIG_USB_CATC is not set
 CONFIG_USB_EHCI_HCD=m
+CONFIG_USB_EHCI_HCD_SSB=y
+CONFIG_EXPERIMENTAL=y
 CONFIG_USB_EHCI_SPLIT_ISO=y
 # CONFIG_USB_KAWETH is not set
 # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
diff --git a/target/linux/brcm47xx/patches-2.6.23/270-ssb-ehci.patch b/target/linux/brcm47xx/patches-2.6.23/270-ssb-ehci.patch
new file mode 100644
index 0000000..7ec4d81
--- /dev/null
+++ b/target/linux/brcm47xx/patches-2.6.23/270-ssb-ehci.patch
@@ -0,0 +1,443 @@
+--- linux-2.6.23.17/drivers/usb/host/ehci-hcd.c.orig	2008-02-25 16:14:28.000000000 -0800
++++ linux-2.6.23.17/drivers/usb/host/ehci-hcd.c	2008-06-02 13:12:46.000000000 -0700
+@@ -960,8 +960,15 @@
+ #define	PLATFORM_DRIVER		ehci_ppc_soc_driver
+ #endif
+ 
+-#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
+-    !defined(PS3_SYSTEM_BUS_DRIVER)
++#ifdef CONFIG_USB_EHCI_HCD_SSB
++#include "ehci-ssb.c"
++#define SSB_EHCI_DRIVER         ssb_ehci_driver
++#endif
++
++#if !defined(PCI_DRIVER) && \
++    !defined(PLATFORM_DRIVER) && \
++    !defined(PS3_SYSTEM_BUS_DRIVER) && \
++    !defined(SSB_EHCI_DRIVER)
+ #error "missing bus glue for ehci-hcd"
+ #endif
+ 
+@@ -1002,9 +1009,16 @@
+ 		return retval;
+ 	}
+ #endif
++#ifdef SSB_EHCI_DRIVER
++	retval = ssb_driver_register(&SSB_EHCI_DRIVER);
++	if (retval < 0)
++		return retval;
++#endif
+ 
+ 	return retval;
+ }
++
++
+ module_init(ehci_hcd_init);
+ 
+ static void __exit ehci_hcd_cleanup(void)
+@@ -1018,6 +1032,9 @@
+ #ifdef PS3_SYSTEM_BUS_DRIVER
+ 	ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
+ #endif
++#ifdef SSB_EHCI_DRIVER
++	ssb_driver_unregister(&SSB_EHCI_DRIVER);
++#endif
+ }
+ module_exit(ehci_hcd_cleanup);
+ 
+--- /dev/null	2008-05-30 09:52:21.955014407 -0700
++++ linux-2.6.23.17/drivers/usb/host/ehci-ssb.c	2008-06-02 13:13:18.000000000 -0700
+@@ -0,0 +1,315 @@
++/*
++ * Sonics Silicon Backplane
++ * Broadcom USB-core EHCI driver (SSB bus glue)
++ * 
++ * Copyright 2007 Steven Brown <[EMAIL PROTECTED]>
++ *
++ * Derived from the OHCI-SSB driver
++ * Copyright 2007 Michael Buesch <[EMAIL PROTECTED]>
++ *
++ * Derived from the EHCI-PCI driver
++ * Copyright (c) 2000-2004 by David Brownell
++ *
++ * Derived from the OHCI-PCI driver
++ * Copyright 1999 Roman Weissgaerber
++ * Copyright 2000-2002 David Brownell
++ * Copyright 1999 Linus Torvalds
++ * Copyright 1999 Gregory P. Smith
++ *
++ * Derived from the USBcore related parts of Broadcom-SB
++ * Copyright 2005 Broadcom Corporation
++ *
++ * Licensed under the GNU/GPL. See COPYING for details.
++ */
++#include <linux/ssb/ssb.h>
++
++
++#define SSB_OHCI_TMSLOW_HOSTMODE	(1 << 29)
++
++struct ssb_ehci_device {
++	struct ehci_hcd ehci; /* _must_ be at the beginning. */
++
++	u32 enable_flags;
++};
++
++static inline
++struct ssb_ehci_device *hcd_to_ssb_ehci(struct usb_hcd *hcd)
++{
++	return (struct ssb_ehci_device *)(hcd->hcd_priv);
++}
++
++
++static int ssb_ehci_reset(struct usb_hcd *hcd)
++{
++	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
++	int err;
++
++ ehci->caps = hcd->regs;
++ ehci->regs = hcd->regs + 
++   HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
++
++ dbg_hcs_params(ehci, "reset");
++ dbg_hcc_params(ehci, "reset");
++
++ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++
++ err = ehci_halt(ehci);
++
++ if (err)
++   return err;
++
++ err = ehci_init(hcd);
++
++ if (err)
++   return err;
++
++ ehci_port_power(ehci, 0);
++
++	return err;
++}
++
++static int ssb_ehci_start(struct usb_hcd *hcd)
++{
++	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
++	int err;
++
++	err = ehci_run(hcd);
++	if (err < 0) {
++		ehci_err(ehci, "can't start\n");
++		ehci_stop(hcd);
++	}
++
++	return err;
++}
++
++#ifdef CONFIG_PM
++static int ssb_ehci_hcd_suspend(struct usb_hcd *hcd, pm_message_t message)
++{
++	struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd);
++	struct ehci_hcd *ehci = &ehcidev->ehci;
++	unsigned long flags;
++
++	spin_lock_irqsave(&ehci->lock, flags);
++
++	ehci_writel(ehci, EHCI_INTR_MIE, &ehci->regs->intrdisable);
++	ehci_readl(ehci, &ehci->regs->intrdisable); /* commit write */
++
++	/* make sure snapshot being resumed re-enumerates everything */
++	if (message.event == PM_EVENT_PRETHAW)
++		ehci_usb_reset(ehci);
++
++	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
++
++	spin_unlock_irqrestore(&ehci->lock, flags);
++	return 0;
++}
++
++static int ssb_ehci_hcd_resume(struct usb_hcd *hcd)
++{
++	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
++	usb_hcd_resume_root_hub(hcd);
++	return 0;
++}
++#endif /* CONFIG_PM */
++
++static const struct hc_driver ssb_ehci_hc_driver = {
++	.description		= "ssb-usb-ehci",
++	.product_desc		= "SSB EHCI Controller",
++	.hcd_priv_size		= sizeof(struct ssb_ehci_device),
++
++	.irq			= ehci_irq,
++	.flags			= HCD_MEMORY | HCD_USB2,
++
++	.reset			= ssb_ehci_reset,
++	.start			= ssb_ehci_start,
++	.stop			= ehci_stop,
++	.shutdown		= ehci_shutdown,
++
++#ifdef CONFIG_PM
++	.suspend		= ssb_ehci_hcd_suspend,
++	.resume			= ssb_ehci_hcd_resume,
++#endif
++
++	.urb_enqueue		= ehci_urb_enqueue,
++	.urb_dequeue		= ehci_urb_dequeue,
++	.endpoint_disable	= ehci_endpoint_disable,
++
++	.get_frame_number	= ehci_get_frame,
++
++	.hub_status_data	= ehci_hub_status_data,
++	.hub_control		= ehci_hub_control,
++#ifdef CONFIG_PM
++	.bus_suspend		= ehci_bus_suspend,
++	.bus_resume		= ehci_bus_resume,
++#endif
++
++};
++
++static void ssb_ehci_detach(struct ssb_device *dev)
++{
++	struct usb_hcd *hcd = ssb_get_drvdata(dev);
++
++	usb_remove_hcd(hcd);
++	iounmap(hcd->regs);
++	usb_put_hcd(hcd);
++}
++
++static int ssb_ehci_attach(struct ssb_device *dev)
++{
++	struct ssb_ehci_device *ehcidev;
++	struct usb_hcd *hcd;
++	int err = -ENOMEM;
++	u32 tmp, flags = 0;
++
++ /*
++  * THE FOLLOWING COMMENTS PRESERVED FROM GPL SOURCE RELEASE
++  *
++  * The USB core requires a special bit to be set during core
++  * reset to enable host (OHCI) mode. Resetting the SB core in
++  * pcibios_enable_device() is a hack for compatibility with
++  * vanilla usb-ohci so that it does not have to know about
++  * SB. A driver that wants to use the USB core in device mode
++  * should know about SB and should reset the bit back to 0
++  * after calling pcibios_enable_device().
++  */
++
++ /*
++  * USB 2.0 special considerations:
++  *
++  * 1. Since the core supports both OHCI and EHCI functions, it must
++  *    only be reset once.
++  *
++  * 2. In addition to the standard SB reset sequence, the Host Control
++  *    Register must be programmed to bring the USB core and various
++  *    phy components out of reset.
++  */
++
++	if (ssb_device_is_enabled(dev))
++		goto core_already_enabled;
++
++	ssb_device_enable(dev, 0);
++	ssb_write32(dev, 0x200, 0x7ff);
++	udelay(1);
++	if (dev->id.revision == 1) { // bug in rev 1
++
++		/* Change Flush control reg */
++		tmp = ssb_read32(dev, 0x400);
++		tmp &= ~8;
++		ssb_write32(dev, 0x400, tmp);
++		tmp = ssb_read32(dev, 0x400);
++		printk("USB20H fcr: 0x%0x\n", tmp);
++
++		/* Change Shim control reg */
++		tmp = ssb_read32(dev, 0x304);
++		tmp &= ~0x100;
++		ssb_write32(dev, 0x304, tmp);
++		tmp = ssb_read32(dev, 0x304);
++		printk("USB20H shim: 0x%0x\n", tmp);
++	}
++
++core_already_enabled:
++	/*
++	 * Try to understand the dma mask stuff
++	 */
++	tmp = ssb_read32(dev, SSB_TMSHIGH);
++	err = ssb_dma_set_mask(dev, DMA_32BIT_MASK);
++	if (err)
++	  return -EOPNOTSUPP;
++
++	hcd = usb_create_hcd(&ssb_ehci_hc_driver, dev->dev,
++			dev->dev->bus_id);
++	if (!hcd)
++		goto err_dev_disable;
++	ehcidev = hcd_to_ssb_ehci(hcd);
++	ehcidev->enable_flags = flags;
++
++	tmp = ssb_read32(dev, SSB_ADMATCH0);
++	hcd->rsrc_start = ssb_admatch_base(tmp) + 0x800; // offset for ehci core
++	hcd->rsrc_len = 0x100 /*ssb_admatch_size(tmp)*/; // size of ehci reg block
++	/*
++	 * start & size modified per sbutils.c
++	 */
++	hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
++	if (!hcd->regs)
++		goto err_put_hcd;
++	err = usb_add_hcd(hcd, dev->irq, IRQF_SHARED | IRQF_DISABLED);
++	if (err)
++		goto err_iounmap;
++
++	ssb_set_drvdata(dev, hcd);
++
++	return err;
++
++err_iounmap:
++	iounmap(hcd->regs);
++err_put_hcd:
++	usb_put_hcd(hcd);
++err_dev_disable:
++	ssb_device_disable(dev, flags);
++	return err;
++}
++
++static int ssb_ehci_probe(struct ssb_device *dev,
++		const struct ssb_device_id *id)
++{
++	int err;
++	u16 chipid_top;
++
++	/* USBcores are only connected on embedded devices. */
++	chipid_top = (dev->bus->chip_id & 0xFF00);
++	if (chipid_top != 0x4700 && chipid_top != 0x5300)
++		return -ENODEV;
++
++	/* TODO: Probably need checks here; is the core connected? */
++
++	if (usb_disabled())
++		return -ENODEV;
++
++	err = ssb_ehci_attach(dev);
++
++	return err;
++}
++
++static void ssb_ehci_remove(struct ssb_device *dev)
++{
++	ssb_ehci_detach(dev);
++}
++
++#ifdef CONFIG_PM
++
++static int ssb_ehci_suspend(struct ssb_device *dev, pm_message_t state)
++{
++	ssb_device_disable(dev, 0);
++
++	return 0;
++}
++
++static int ssb_ehci_resume(struct ssb_device *dev)
++{
++	struct usb_hcd *hcd = ssb_get_drvdata(dev);
++	struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd);
++
++	ssb_device_enable(dev, ehcidev->enable_flags);
++
++	return 0;
++}
++
++#else /* !CONFIG_PM */
++#define ssb_ehci_suspend	NULL
++#define ssb_ehci_resume	NULL
++#endif /* CONFIG_PM */
++
++static const struct ssb_device_id ssb_ehci_table[] = {
++	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
++	SSB_DEVTABLE_END
++};
++MODULE_DEVICE_TABLE(ssb, ssb_ehci_table);
++
++static struct ssb_driver ssb_ehci_driver = {
++	.name		= KBUILD_MODNAME,
++	.id_table	= ssb_ehci_table,
++	.probe		= ssb_ehci_probe,
++	.remove		= ssb_ehci_remove,
++	.suspend	= ssb_ehci_suspend,
++	.resume		= ssb_ehci_resume,
++};
+--- linux-2.6.23.17/drivers/usb/host/Kconfig.orig	2008-06-02 12:43:30.000000000 -0700
++++ linux-2.6.23.17/drivers/usb/host/Kconfig	2008-06-02 13:12:46.000000000 -0700
+@@ -84,6 +84,19 @@
+ 	---help---
+ 	  Variation of ARC USB block used in some Freescale chips.
+ 
++config USB_EHCI_HCD_SSB
++	bool "EHCI support for Broadcom SSB EHCI core"
++	depends on USB_EHCI_HCD && SSB && EXPERIMENTAL
++	default n
++	---help---
++	  Support for the Sonics Silicon Backplane (SSB) attached
++	  Broadcom USB EHCI core.
++
++	  This device is present in some embedded devices with
++	  Broadcom based SSB bus.
++
++	  If unsure, say N.
++
+ config USB_ISP116X_HCD
+ 	tristate "ISP116X HCD support"
+ 	depends on USB
+--- linux-2.6.23.17/drivers/usb/host/ohci-ssb.c.orig	2008-06-02 12:43:30.000000000 -0700
++++ linux-2.6.23.17/drivers/usb/host/ohci-ssb.c	2008-06-02 13:16:53.000000000 -0700
+@@ -132,7 +132,6 @@
+ 	usb_remove_hcd(hcd);
+ 	iounmap(hcd->regs);
+ 	usb_put_hcd(hcd);
+-	ssb_device_disable(dev, 0);
+ }
+ 
+ static int ssb_ohci_attach(struct ssb_device *dev)
+@@ -142,6 +141,8 @@
+ 	int err = -ENOMEM;
+ 	u32 tmp, flags = 0;
+ 
++	if (!(ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET))
++		goto core_already_enabled; 
+ 	/*
+ 	 * THE FOLLOWING COMMENTS PRESERVED FROM GPL SOURCE RELEASE
+ 	 *
+@@ -170,8 +171,9 @@
+ 	 *    phy components out of reset. 
+ 	 */
+ 
+-	else if (dev->id.coreid == SSB_DEV_USB20_HOST) {
+-#warning FIX ME need test for core being up & exit
++	else if ((dev->id.coreid == SSB_DEV_USB11_HOST) && (dev->function ==1)) {
++		if (ssb_device_is_enabled(dev))
++			goto core_already_enabled; 
+ 		ssb_device_enable(dev, 0);
+ 		ssb_write32(dev, 0x200, 0x7ff);
+ 		udelay(1);
+@@ -195,6 +197,7 @@
+ 	else
+ 		ssb_device_enable(dev, 0);
+ 
++core_already_enabled:
+  /*
+   * Set dma mask - 32 bit mask is just an assumption
+   */
+@@ -214,7 +217,7 @@
+ 	hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
+ 	if (!hcd->regs)
+ 		goto err_put_hcd;
+-	err = usb_add_hcd(hcd, dev->irq, IRQF_SHARED);
++	err = usb_add_hcd(hcd, dev->irq, IRQF_DISABLED | IRQF_SHARED);
+ 	if (err)
+ 		goto err_iounmap;
+ 
+@@ -289,7 +292,6 @@
+ static const struct ssb_device_id ssb_ohci_table[] = {
+ 	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
+ 	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
+-	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
+ 	SSB_DEVTABLE_END
+ };
+ MODULE_DEVICE_TABLE(ssb, ssb_ohci_table);
diff --git a/target/linux/brcm47xx/patches-2.6.23/275-ssb-multifunction.patch b/target/linux/brcm47xx/patches-2.6.23/275-ssb-multifunction.patch
new file mode 100644
index 0000000..bb07c6f
--- /dev/null
+++ b/target/linux/brcm47xx/patches-2.6.23/275-ssb-multifunction.patch
@@ -0,0 +1,147 @@
+--- linux-2.6.23.17/drivers/ssb/driver_mipscore.c.orig	2008-04-16 14:38:41.000000000 -0400
++++ linux-2.6.23.17/drivers/ssb/driver_mipscore.c	2008-04-22 05:23:29.000000000 -0400
+@@ -203,10 +203,14 @@
+ 		dev->irq = ssb_mips_irq(dev) + 2;
+ 		switch (dev->id.coreid) {
+ 		case SSB_DEV_USB11_HOST:
++		case SSB_DEV_USB20_HOST:
+ 			/* shouldn't need a separate irq line for non-4710, most of them have a proper
+ 			 * external usb controller on the pci */
+-			if ((bus->chip_id == 0x4710) && (irq <= 4)) {
+-				set_irq(dev, irq++);
++			if (((bus->chip_id == 0x4710) || (bus->chip_id == 0x5354)) && (irq <= 4)) {
++				if (dev->function == 1)
++					set_irq(dev, irq - 1); // same irq for OHCI, shares core w/ EHCI
++				else
++					set_irq(dev, irq++);
+ 				break;
+ 			}
+ 			/* fallthrough */
+@@ -214,7 +218,6 @@
+ 		case SSB_DEV_ETHERNET:
+ 		case SSB_DEV_ETHERNET_GBIT:
+ 		case SSB_DEV_80211:
+-		case SSB_DEV_USB20_HOST:
+ 			/* These devices get their own IRQ line if available, the rest goes on IRQ0 */
+ 			if (irq <= 4) {
+ 				set_irq(dev, irq++);
+--- linux-2.6.23.17/drivers/ssb/scan.c.orig	2008-04-16 14:38:41.000000000 -0400
++++ linux-2.6.23.17/drivers/ssb/scan.c	2008-04-22 06:48:19.000000000 -0400
+@@ -277,6 +277,8 @@
+ 	rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
+ 
+ 	bus->nr_devices = 0;
++	bus->nr_cores = 0;
++
+ 	if (cc == SSB_DEV_CHIPCOMMON) {
+ 		tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
+ 
+@@ -286,7 +288,7 @@
+ 		bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
+ 				    SSB_CHIPCO_PACKSHIFT;
+ 		if (rev >= 4) {
+-			bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
++			bus->nr_cores = (tmp & SSB_CHIPCO_NRCORESMASK) >>
+ 					  SSB_CHIPCO_NRCORESSHIFT;
+ 		}
+ 		tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
+@@ -303,12 +305,12 @@
+ 			bus->chip_package = 0;
+ 		}
+ 	}
+-	if (!bus->nr_devices)
+-		bus->nr_devices = chipid_to_nrcores(bus->chip_id);
+-	if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
++	if (!bus->nr_cores)
++		bus->nr_cores = chipid_to_nrcores(bus->chip_id);
++	if (bus->nr_cores > ARRAY_SIZE(bus->devices)) { // this isn't really true, nr_cores != nr_devices
+ 		ssb_printk(KERN_ERR PFX
+ 			   "More than %d ssb cores found (%d)\n",
+-			   SSB_MAX_NR_CORES, bus->nr_devices);
++			   SSB_MAX_NR_CORES, bus->nr_cores);
+ 		goto err_unmap;
+ 	}
+ 	if (bus->bustype == SSB_BUSTYPE_SSB) {
+@@ -317,14 +319,14 @@
+ 		 */
+ 		err = -ENOMEM;
+ 		iounmap(mmio);
+-		mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
++		mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_cores);
+ 		if (!mmio)
+ 			goto out;
+ 		bus->mmio = mmio;
+ 	}
+ 
+ 	/* Fetch basic information about each core/device */
+-	for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
++	for (i = 0, dev_i = 0; i < bus->nr_cores; i++) {
+ 		err = scan_switchcore(bus, i);
+ 		if (err)
+ 			goto err_unmap;
+@@ -336,16 +338,41 @@
+ 		dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
+ 		dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
+ 		dev->core_index = i;
++		dev->function = 0;
+ 		dev->bus = bus;
+ 		dev->ops = bus->ops;
+ 
+ 		ssb_dprintk(KERN_INFO PFX
+-			    "Core %d found: %s "
++			    "Core %d.%d found: %s "
+ 			    "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
+-			    i, ssb_core_name(dev->id.coreid),
++			    i, dev->function, ssb_core_name(dev->id.coreid),
+ 			    dev->id.coreid, dev->id.revision, dev->id.vendor);
+ 
+ 		switch (dev->id.coreid) {
++		/*
++		 * Add second device for this multi-function core
++		 */
++		case SSB_DEV_USB20_HOST:
++			dev_i++;
++			dev = &(bus->devices[dev_i]);
++	                idhi = scan_read32(bus, i, SSB_IDHIGH);
++		        dev->id.coreid = SSB_DEV_USB11_HOST; // make function 1 device ohci
++			dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
++	                dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
++	                dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
++	                dev->core_index = i;
++			dev->function = 1;
++	                dev->bus = bus;
++	                dev->ops = bus->ops;
++
++	                ssb_dprintk(KERN_INFO PFX
++                            "Core %d.%d found: %s "
++                            "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
++                            i, dev->function, ssb_core_name(dev->id.coreid),
++                            dev->id.coreid, dev->id.revision, dev->id.vendor);
++
++			
++			break;
+ 		case SSB_DEV_80211:
+ 			nr_80211_cores++;
+ 			if (nr_80211_cores > 1) {
+--- linux-2.6.23.17/include/linux/ssb/ssb.h.orig	2008-04-16 14:38:41.000000000 -0400
++++ linux-2.6.23.17/include/linux/ssb/ssb.h	2008-04-20 15:10:35.000000000 -0400
+@@ -135,6 +135,7 @@
+ 	struct ssb_device_id id;
+ 
+ 	u8 core_index;
++	u8 function;
+ 	unsigned int irq;
+ 
+ 	/* Internal-only stuff follows. */
+@@ -256,7 +257,10 @@
+ 	u16 sprom_size;		/* number of words in sprom */
+ 	u8 chip_package;
+ 
+-	/* List of devices (cores) on the backplane. */
++	/* Number of cores on the backplane. */
++	u8 nr_cores;
++
++	/* List of devices on the backplane. */
+ 	struct ssb_device devices[SSB_MAX_NR_CORES];
+ 	u8 nr_devices;
+ 
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