At 09:52 PM 6/27/2005, Dennis Saputelli wrote:

further inspection showed many wires drawn on grid 1
although wires don't list coords (at least in 99)
i can see this with the visible grid set to 5

Yes. I could call it a bonehead mistake, but really it is just a designer unfamiliar with the program. I've seen it before. I've also seen an engineer use PCB to design a PCB board, but he didn't want to bother with making footprints, so he just put down pads and text reference designators. Then he roped a tech into helping him trace the board off against the schematic. Didn't catch all the deviations from schematic, though....

i guess i was never aware that one could take a part and that the part pin would snap to an off grid location (obviously taking the whole part with it) while the grid was set to 10

You could make the same mistake in OrCAD, as I recall.

Sure, there are some systems that make this mistake just about impossible, but they do this at the cost of flexibility. Note that to get a grid of 1, the engineer had to change the grid while making the symbols. Now, why did he do that? The default is 10.

am i headed for trouble here ?

You are already in trouble. My recommendation is that you or someone fix the symbols and replace them and clean up the schematic.

related question
with enough care and precision can one draw a schematic a grid 1 and expect the connectivity to work ?

Sure. With *enough* care and precision. It can be done. Now, is it easier to do that or to fix the schematic to have normal grid. I'd vote for the latter. Keeping it simply institutionalizes the problem.

do i really need to move all the wires around?, there are pretty many of them

Yes. Sorry, Dennis. You can use snap to fix the connections, but you'll have to do it very carefully. It is probably just as easy, if not easier, to fix the problem.

now don't blast my friend, he is a *very* smart guy and this was his first schematic with absolutely no prior experience w/ protel and it's quirks
he actually expects the sw to help him with the task!

The CAD systems are all different. Each has its strengths and its weaknesses. Protel schematic is actually pretty easy, but you can definitely screw it up, he found a way.

my friend absolutely HATES protel for sch (he doesn't do boards)
he says it is the biggest bunch of garbage he has ever seen and he has been around the block with many programs

I'd say that he might be dizzy from going around the block so many times. He is mistaking his familiarity with a set of methods with the superiority of those methods. If you try to use Protel like some other program, or you try to use some other program like Protel, you are bound to make mistakes and to get frustrated. You have to, instead, learn to use the program as it was designed to be used.

his gripes (again he was using P2004 SP2)
  the wiring, rubberbanding
  RMB rarely has anything he expected or wanted
  too much work to fill all the metadata into fields

Does he know how to import spreadsheet data?

  too much work always repositioning text after rotating parts

It can be irritating, but it takes very little time to fix refdes and type text for a whole sheet. It is wasted time to fix it immediately when putting the sheet together. After all, you might move the part again. Protel guesses where you might want to put the text. It often guesses wrong. I think that there are a couple of glitches in this particular process, haven't looked lately.

  part building too hard compared to designworks
  busses were not easy to use with mixed signals
  and so on

You do have to understand how Protel does it. Busses with mixed signals are a whole can of worms. However, if you want the illusion of a bus, it is easy to obtain, since it is the net labels that actually implement the connections. Protel uses a very simple and clear naming convention. Yes, sometimes we have wished that it would handle mixed signal "busses," such as a control bus with different names like InEnable and OutEnable. These are, in a sense, actual busses, they might come from a single octal latch somewhere, for example, and they are sourced perhaps from a single processor bus. But I'm not sure that much is gained by setting up a method of defining them as a bus. It may well be better to require explicit naming. If you want, as I mention, you can create the illusion of a bus with lines. That is, you can make it appear that mixed signals are tied together in some way. I'm just not sure enough is gained to make it worth the complexity that it introduces.

Every program has made tradeoffs between flexibility and ease-of-use. Inflexible can be quite easy to use, if you accept it for what it is. And total flexibility can be a pain in the rump, indeed, the grid 1 problem was a result of program flexibility.

Your friend, quite simply, is accustomed to one program and he's holding on to the way that it does things as superior. Maybe, maybe not. More likely it is superior in some ways and not in others. The problem for him, really, is that it is different.



____________________________________________________________
You are subscribed to the PEDA discussion forum

To Post messages:
mailto:[email protected]

Unsubscribe and Other Options:
http://techservinc.com/mailman/listinfo/peda_techservinc.com

Browse or Search Old Archives (2001-2004):
http://www.mail-archive.com/[email protected]

Browse or Search Current Archives (2004-Current):
http://www.mail-archive.com/[email protected]

Reply via email to