can you explain pattern plating ?
i thought it was using the tin/lead plating as etch resist

ds

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Integrated Controls, Inc.           Tel: 415-647-0480  EXT 107
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Brad Velander wrote:
> Jon,
>       Sounds like you had soldermask that wasn't over bare copper. With the 
> SMOBC you shouldn't have that problem. With solder plated traces (some fabs 
> used to use that as their etch resist, I didn't know anybody was still doing 
> it) under soldermask you will definitely have that problem.
>       Regardless, if you specify SMOBC this shouldn't happen to you. 
> Otherwise it is exhibiting poor mask adhesion or something in your assembly 
> processing is out of whack.
> 
>       Pattern plating is whole other fish that isn't related to finishing or 
> soldermask.
> 
> Sincerely,
> Brad Velander
> Senior PCB Designer
> Northern Airborne Technology
> #14 - 1925 Kirschner Road,
> Kelowna, BC, V1Y 4N7.
> tel (250) 763-2329 ext. 225
> fax (250) 762-3374
> 
> 
> 
> -----Original Message-----
> From: Jon Elson [mailto:[EMAIL PROTECTED]
> Sent: Wednesday, January 18, 2006 11:52 AM
> To: Protel EDA Discussion List
> Subject: Re: [PEDA] Solder Masks for vias.
> 
> 
> 
> 
> Brad Kosiance wrote:
> 
> 
>>For a via that is close to a surface mount pad I need the solder mask to
>>cover the via so that the via does not steal the solder away.
>>
>>Is the best way to do this to set the Solder Mask Override setting to a
>>negative number (i.e. -20mil)?
>> 
>>
> 
> Are you sure this actually works?  I have seen the solder flow under the
> solder mask, making the solder mask "float" over a big "bubble" of
> solder.  It probably makes a big difference whether the PCB technology is
> SMOBC or pattern plating.
> 
> Jon
> 
>  
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