On Thu, Sep 05, 2002 at 04:38:37AM -0400, Dan Sugalski wrote:
> At 8:04 AM +0000 9/5/02, Leopold Toetsch (via RT) wrote:
> >core.ops has currently:
> >
> >- obvious errors e.g.
> > -inline op mul (out PMC, out PMC, out PMC) {
> >
> >- wrong docu and minor typos e.g.
> > -=item B<loadlib>(in PMC, in STR)
> >
> >- and finally (as discussed in perl6-internals, "core ops ARGDIR"),
> >wrong ARGDIRs for PMCs:
>
> We need to nail down what the directions mean. The IMCC and JIT folks
> are the ones that care here. I've been working on the assumption that
> an out means that the register in question may change value, so it's
> not appropriate on, say, add P1, P2, P3, since the destination
> *register* doesn't change, just the value of the PMC in the register.
> This is different than, say, add I1, I2, I3 where the value in the
> destination register does change.
That makes it sound like we have (at least) 2 directions of out. We seem
to have
in the register is read,
(and the value pointed to by the register is read)
out1 the register is written to
out2 the value pointed to by the register is written to, but the register
itself is unchanged
and both are useful, but for different parts of optimisation. I suspect
(but I don't know about imcc, and I've not thought about it) that out2 is
useful for optimising how many PMCs you actually need to use as temporaries
in the first place, and out1 is useful for optimising how you map
temporaries to real parrot registers. But I'm guessing, and for JIT
purposes I think only need to know about out1.
Nicholas Clark
