On Tue, 23 Nov 2004 14:19:44 +0800, Bopolissimus Platypus Jr <[EMAIL PROTECTED]> wrote: > On Tue, 23 Nov 2004 11:28:42 +0800, June G. Gonzales > <[EMAIL PROTECTED]> wrote: > > Just curious, does this mean, that it's not yet advisable to > > buy a P4 with HT yet?
On-chip simultaneous multithreading has its place - you get two separate execution threads at the kernel level which can improve performance. The kernel can also interrupt faster However, you can get better mileage with getting a processor with a bigger bus bandwidth as opposed to simultaneous multithreading. Reason is shown below > from the discussions on this thread it looks like HT doesn't > give you any performance boost. so don't buy it for > performance (OTOH, maybe there's a performance difference > in windows? not that i'd know, no windows boxes to test on, > or any windows apps either) but maybe buy it if you need > to test or run an app that *requires* SMP but your budget > doesn't quite stretch to a real SMP box. Traditional SMP architecture features processors each with its own set of caches, execution resources, and buses. You won't have much problems if you don't saturate the bus by data transfers, don't have contention over the bus, and keep the CPU cores busy. This is achievable if you employ your machine as a processing workhorse and not as a memory-chewing machine. On-chip simultaneous multithreading, however, is constrained by having only one set of caches, one set of execution resources, and one bus, but you have two logical CPUs contending for those, each running its own different thread. A thread can hog most of the resources of your machine should the other thread choose not to use them. This is why SMT generally screws up scheduling algorithms that work normally in traditional SMP systems. Another issue to contend with is a design flaw (the 64k aliasing problem) in more prevalent Xeon (northwood, supposedly fixed in prescott/nocona chips) wherein two logical CPUs can clash over resources, rendering the cache associativity pretty much useless and sometimes just reduces performance. Couple this with the Pentium IV/Xeon having a longer pipeline and low number of registers being CISC thus making execution of multiple instructions, and you've got a hyperthreading system not scaling up as you get more memory. This might be also the reason why Intel would disable HT in future dual core products. -- Paolo Alexis Falcone [EMAIL PROTECTED] -- Philippine Linux Users' Group (PLUG) Mailing List [EMAIL PROTECTED] (#PLUG @ irc.free.net.ph) Official Website: http://plug.linux.org.ph Searchable Archives: http://marc.free.net.ph . To leave, go to http://lists.q-linux.com/mailman/listinfo/plug . Are you a Linux newbie? To join the newbie list, go to http://lists.q-linux.com/mailman/listinfo/ph-linux-newbie
