On Sat, Jul 7, 2012 at 19:43 UTC, Justin Piszcz wrote: > I've done some more reading and what I've found is anything over 500ppm ntp > cannot correct for; so is this would be a bad crystal/chip or is there > something else wrong here? > > Supermicro X9SCM: (see the error_ppm) is all over the map: > > # adjtimex -a > --- current --- -- suggested -- > cmos time system-cmos error_ppm tick freq tick freq > 1341688282 -0.731743 > 1341688292 -0.731619 12.4 9993 3497075 > 1341688302 -0.747186 -1556.7 9993 3497075 10009 659788 > 1341688312 -0.747117 6.9 9993 3497075 9993 3045513 > 1341688322 -0.747099 1.8 9993 3497075 9993 3378325 > 1341688332 -0.762636 -1553.7 9993 3378325 10009 344163 > 1341688342 -0.762650 -1.4 9993 3378325 9993 3470512 > 1341688352 -0.778221 -1557.1 9993 3378325 10009 566038
ntpd doesn't discpline the CMOS clock. As long as your OS clock runs within 500 PPM of nominal, ntpd should manage it. Errors introduced each boot by the wayward CMOS clock will get stepped away early by ntpd (or ntpdate, if it's run before ntpd). Cheers, Dave Hart _______________________________________________ pool mailing list [email protected] http://lists.ntp.org/listinfo/pool
