John, You really don't have to do a netlist compare. I see designers doing this all of the time. This may have developed because of a mistrust of other programs they have used because DRCs couldn't be trusted. The bottom line is the DRC netlist checking in versions 2.8 - 99SE SP 6 work and work quite well. As far as I know the errors that the program will not check for is : 1 if you deleted a component 2: duplicate pins., 3 it will miss split plane problems once in while.
To address your real question, the differences could be attributed to several things, 1: the netlist generated from the board does not accurately represent the board because of a Protel issue ( I don't call this one a bug because the DRC wasn't designed to work this way) . 2 A second netlist generated from the schematic may have different names for nets which we not names. 3. Other parts, or pads on the netlist which you have connected are now in the netlist, 4: Plane information is not accurately generated. In any case this is not a good method of verification A Fool Proof method for verification: Clear all nets, Load netlist again Update free primitives from pad Run your DRCs. Review your DRCs , if you have everything set up right it should all read 0 I will guarantee this is 100 percent fool proof. Good Luck Mike Reagan EDSI Frederick Md About Netlist Compare and Partially Matched Nets. Protel 99SE SP6. > Hello All, > Have a PCB design that is completely routed. The board information report > and DRC report state that everything is 100% routed with no violations. OK > great. > > In the schematic side I generate a Netlist. Now I go to the PCB side and > from Netlist Manager I export the Netlist from PCB. I then do a Netlist > compare and everything is good. > > I then go to the schematic side again and do a Netlist compare with the > same two files. The report states that I have 2 Partially Matched Nets. > How can this be? > > What exactly is a Partially Matched Net? To me it sounds like parts of the > net in question are not completely routed. > > Has anyone out there had this experience? Do I have a problem with my > design or is this a Protel bug - feature? > > Any information that you can give me will be greatly appreciated. Thank > you for your time and have a nice day. > > > > John Branthoover : > Electrical Design Engineer : > Acutronic R & D :Phone (412) 968-1051 > 640 Alpha Drive :Fax (412) 963-0816 > Pittsburgh PA 15238 :Email [EMAIL PROTECTED] > USA :WEB http://www.acutronic.com > > > * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * To post a message: mailto:[EMAIL PROTECTED] * * To leave this list visit: * http://www.techservinc.com/protelusers/leave.html * * Contact the list manager: * mailto:[EMAIL PROTECTED] * * Forum Guidelines Rules: * http://www.techservinc.com/protelusers/forumrules.html * * Browse or Search previous postings: * http://www.mail-archive.com/proteledaforum@techservinc.com * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
