TEST. > -----Original Message----- > From: John A. Ross [Design] [mailto:[EMAIL PROTECTED] > Sent: Thursday, March 11, 2004 2:49 PM > To: Protel EDA Forum > Subject: Re: [PEDA] Common PCB footprint specifications > > Ray > > I know your pain, I started off life as a designer, then a > layout engineer and after working with a lot of sub > contractors did my bit in process engineering, then in > service/manufacturing doing failure analysis and feeding that > back to design where I ended up (again) and due to the > experience I had stayed there doing a better job (IMO anyway) > than I did in the first place. > > But I think your frustrations are getting to you a bit, or my > long response tipped you over the edge (sorry), but as you > mentioned in your reply below, you had issues with data > sheets and also manufacturing, because of library/footprint > issues, so as I said, a library has to be more than it looks. > And you cannot rely on the data sheets 100% unless it has a > report attached to it with all manufacturing details, > Motorlola and NSC do a lot of this, but most passive companies do not. > > > Best Regards > > John A. Ross > > RSD Communications ltd > Email [EMAIL PROTECTED] > WWW http://www.rsd.tv > ================================== > > > -----Original Message----- > > From: Ray Mitchell [mailto:[EMAIL PROTECTED] > > Sent: Thursday, March 11, 2004 7:48 PM > > To: Protel EDA Forum > > Subject: Re: [PEDA] Common PCB footprint specifications > > > > Everyone, > > > > Thanks for all the responses on footprints. This whole issue is > > pretty sickening actually. Since we produce low quantities > of diverse > > products we have no dedicated PCB layout people. All engineers do > > their own circuit designs and parts specification and > ultimately are > > expected to do tiny PCB layouts of everything and get them > to work. > > The thing that gets me is that it seems like it would be extremely > > simple for parts vendors to provide land patterns for their parts > > along with the mechanical drawings of the parts themselves. > Some do > > but most don't. I just talked to Maxim about this and they > said they > > simply don't provide this information. They recommended > IPCSM782. Of > > course a good percentage of the parts you need are not > listed in this > > document and a lot of them that are there do not match the > > recommendations of the vendors of the parts. I asked Maxim > how they > > layout their own eval boards since they provide no > guidelines and no > > guidelines exist in IPCSM782. They didn't have an answer but I > > suspect they rely on rules of thumb and intuition, which is what we > > end up doing with our designs here most of the time. After > enough bad > > yields and scolding from our PCB fabricators we manage to > stumble into > > something that seems to work. I did find what I thought was a good > > layout for 0402, 0603, etc. from AVX capacitors. Upon closer > > inspection, however, I found that their recommended footprints > > violated their own guidelines given on a > > different page of the same document. Go figure! > > > > Ray Mitchell > > > > > > At 04:59 PM 3/11/2004 +0000, you wrote: > > > > -----Original Message----- > > > > From: Ray Mitchell [mailto:[EMAIL PROTECTED] > > > > Sent: Wednesday, March 10, 2004 5:36 PM > > > > To: [EMAIL PROTECTED] > > > > Subject: [PEDA] Common PCB footprint specifications > > > > > > > > Hello, > > > > > > > > I'm sure this is a repeat, but is there a simple specification > > > > readily available that gives the "commonly accepted" > (if there is > > > > such a thing) dimensions for 0402, 0603, ..., SIOC-14, > > etc., and all > > > > the other "standard" > > > > footprints? I don't really want to wade through a bunch of > > > > technical stuff to derive all of this myself and I > > certainly don't > > > > want to trust a priori the patterns that come with > Protel or any > > > > other product. It's really annoying when part > > manufacturers don't > > > > provide these footprints, assuming they are common knowledge. > > > > > >Ray > > > > > >I have accumulated quite a library of such footprints but > > most of them > > >will have been optimised to suit our in house processes more than > > >following the IPC standards. > > > > > >The supplied Protel IPC land patterns are not too bad, they are > > >certainly a good basis to build your own on. But most > > libraries stop at > > >the land pattern stage, which is what the IPC are looking > to change. > > > > > >A lot of the way the IPC are trying to structure library > conventions > > >are along the lines of what I was already doing for years > > anyway, not > > >because it is good, but because it make life easier for us > > internally > > >if the naming conventions for footprints already match > > vision library > > >footprints on placement machines (which then relates to mechanical > > >dimensions as well, as a Murata 16V X7R 0603 will have different > > >dimensions to a Kemet 16V X7R 0603 in same voltage) and other EDA > > >packages we use etc. > > > > > >I especially like the way the new IPC recommendations take > > account of > > >things like, 0 deg positions in tape or tray, if Protel > > could also make > > >allowances for rotation on non-polarised chip parts (only > > use 0,90) to > > >reduce un-necessary head rotations on turret head placers > > that would be > > >even better as I currently use an in house utility to > parse the P&P > > >files and check for string matches on footprint & part number to > > >identify non-polarised parts and it will replace 360 or 180 > > values with > > >0 and 270 values with 90. > > > > > >In DXP I planned to use a parameter for that at SCH level, > so I only > > >need to check for one match, but that's another story, no time for > > >documenting or agreeing how this should be done internally yet. > > > > > >Same with pad sizes, I slightly oversize SMT pads in some > > cases against > > >IPC recommendations (not much) to allow for place tolerances when > > >reducing Z height & down pressure, Vac release and place speed, > > >especially on Chip r/c's as well as wave flow direction and so on. > > >Same for connector placement, especially for IDC and > connector rows > > ><2.54mm, I sometimes enlarge the pads beyond IPC > > recommendations in one > > >direction to get the best out of the features on our wave > soldering > > >equipment (Vitronics-Soltec with Select-X debridging). > > > > > >If Protel could assign a different footprint for rotation, > or side, > > >based on some sort of logical system, then it would make > > life so much > > >easier to define DFM rules even at SCH level. > > >Perhaps that's worth a new feature request on the DXP forum :) > > > > > >To me a library has to be more than just a symbols > > collection, or the > > >manual pre-processing required diminishes its value, very > > little third > > >party libraries do this, so IMO are not worth it. > > > > > >I like the IPC new offerings for library recommendations > > very much, and > > >would like to see it adopted, even although some of the naming > > >recommendations may choke some placement machines offline > > programming > > >software or optimisers software a bit like white space, > characters, > > >case sensitivity and a lot of other things that should be > > non-issues in > > >this day/age. I prefer a direct import approach to > programming these > > >machines, Gerber import, pattern search and processing is > > alright, but > > >takes to long and can be error prone. > > > > > >If anyone wants me to split & upload the library contents I > > have here, > > >ill do it as a part time job, but I guess most people will > > have these > > >things already, or prefer to use their own in-house libraries. > > > > > >John > > > > > > > > > > Ray Mitchell > > Engineer, Code 2732 > > SPAWAR Systems Center > > San Diego, CA. 92152 > > (619)553-5344 > > [EMAIL PROTECTED] > > > > >
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