For now, TYPE_FSL_ESDHC_BE is basically a big-endian variant of TYPE_IMX_USDHC. It will be used in the e500 machines in the next step which prevents Linux to flood the console with "mmc0: Internal clock never stabilised" messages.
Signed-off-by: Bernhard Beschow <[email protected]> --- include/hw/sd/sdhci.h | 2 ++ hw/sd/sdhci.c | 31 +++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 32962c210d..3eb0684a89 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -128,6 +128,8 @@ DECLARE_INSTANCE_CHECKER(SDHCIState, PCI_SDHCI, DECLARE_INSTANCE_CHECKER(SDHCIState, SYSBUS_SDHCI, TYPE_SYSBUS_SDHCI) +#define TYPE_FSL_ESDHC_BE "fsl-esdhc-be" + #define TYPE_IMX_USDHC "imx-usdhc" #define TYPE_S3C_SDHCI "s3c-sdhci" diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 531dd3c291..6277abe870 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1871,6 +1871,32 @@ esdhc_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) } } +static const MemoryRegionOps esdhc_mmio_be_ops = { + .read = esdhc_read, + .write = esdhc_write, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + }, + .valid = { + .min_access_size = 1, + .max_access_size = 4, + .unaligned = false + }, + .endianness = DEVICE_BIG_ENDIAN, +}; + +static void fsl_esdhc_be_init(Object *obj) +{ + SDHCIState *s = SYSBUS_SDHCI(obj); + DeviceState *dev = DEVICE(obj); + + s->io_ops = &esdhc_mmio_be_ops; + s->quirks = SDHCI_QUIRK_NO_BUSY_IRQ; + qdev_prop_set_uint8(dev, "sd-spec-version", 2); + qdev_prop_set_uint8(dev, "vendor", SDHCI_VENDOR_FSL); +} + static const MemoryRegionOps usdhc_mmio_ops = { .read = esdhc_read, .write = esdhc_write, @@ -1965,6 +1991,11 @@ static const TypeInfo sdhci_types[] = { .instance_finalize = sdhci_sysbus_finalize, .class_init = sdhci_sysbus_class_init, }, + { + .name = TYPE_FSL_ESDHC_BE, + .parent = TYPE_SYSBUS_SDHCI, + .instance_init = fsl_esdhc_be_init, + }, { .name = TYPE_IMX_USDHC, .parent = TYPE_SYSBUS_SDHCI, -- 2.52.0
