Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 426ca9493817b53085c90afafd0c46dd5202d595
https://github.com/qemu/qemu/commit/426ca9493817b53085c90afafd0c46dd5202d595
Author: Bin Meng <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/sd/ssi-sd.c
Log Message:
-----------
hw/sd: Remove unused header includes in ssi-sd.c
Remove these header files which are not used by ssi-sd.c
Signed-off-by: Bin Meng <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 70c0198ef31379788c57850f34ee67f8504324e0
https://github.com/qemu/qemu/commit/70c0198ef31379788c57850f34ee67f8504324e0
Author: Osama Abdelkader <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M system/vl.c
Log Message:
-----------
hw/core: remove duplicate include
qemu/target-info.h is included twice.
Signed-off-by: Osama Abdelkader <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: ceaaeb2ad91a39189bd60f21ebc0653a44e0de2a
https://github.com/qemu/qemu/commit/ceaaeb2ad91a39189bd60f21ebc0653a44e0de2a
Author: Anton Johansson <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/riscv/boot.c
M hw/riscv/microchip_pfsoc.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M include/hw/riscv/boot.h
Log Message:
-----------
hw/riscv: Treat kernel_start_addr as vaddr
Changes kernel_start_addr from target_ulong to vaddr. Logically, the
argument represents a virtual address at which to load the kernel image,
which gets treated as a hwaddr as a fallback if elf and uimage loading
fails.
Suggested-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Anton Johansson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: d0c84808ae12d7ad409ffe232f7b71969b078511
https://github.com/qemu/qemu/commit/d0c84808ae12d7ad409ffe232f7b71969b078511
Author: Alex Bennée <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/misc/tz-ppc.c
Log Message:
-----------
hw/misc: make the tz-ppc-port names more useful
The TrustZone peripheral protection controller (tz-ppc) sits between
peripherals and the main system. However this results in "info mtree"
looking at bit confusing, especially as the sequence numbers can
overlap and miss steps:
0000000000000000-ffffffffffffffff (prio -2, i/o): system
0000000000000000-00000000003fffff (prio 0, i/o): tz-mpc-upstream
0000000000400000-00000000007fffff (prio 0, i/o): alias ssram-0-alias
@tz-mpc-upstream 0000000000000000-00000000003fffff
0000000028000000-00000000281fffff (prio 0, i/o): tz-mpc-upstream
0000000028200000-00000000283fffff (prio 0, i/o): tz-mpc-upstream
0000000040080000-0000000040080fff (prio 0, i/o): iotkit-secctl-ns-regs
0000000040100000-0000000040100fff (prio 0, i/o): tz-ppc-port[1]
0000000040101000-0000000040101fff (prio 0, i/o): tz-ppc-port[2]
0000000040102000-0000000040102fff (prio 0, i/o): tz-ppc-port[3]
0000000040103000-0000000040103fff (prio 0, i/o): tz-ppc-port[4]
0000000040110000-0000000040110fff (prio 0, i/o): tz-ppc-port[0]
0000000040111000-0000000040111fff (prio 0, i/o): tz-ppc-port[1]
0000000040112000-0000000040112fff (prio 0, i/o): tz-ppc-port[2]
0000000040113000-0000000040113fff (prio 0, i/o): tz-ppc-port[3]
0000000040200000-0000000040200fff (prio 0, i/o): tz-ppc-port[5]
0000000040201000-0000000040201fff (prio 0, i/o): tz-ppc-port[6]
0000000040202000-0000000040202fff (prio 0, i/o): tz-ppc-port[7]
0000000040203000-0000000040203fff (prio 0, i/o): tz-ppc-port[8]
0000000040204000-0000000040204fff (prio 0, i/o): tz-ppc-port[9]
0000000040205000-0000000040205fff (prio 0, i/o): tz-ppc-port[0]
0000000040206000-0000000040206fff (prio 0, i/o): tz-ppc-port[1]
0000000040207000-0000000040207fff (prio 0, i/o): tz-ppc-port[10]
0000000040208000-0000000040208fff (prio 0, i/o): tz-ppc-port[11]
0000000040209000-0000000040209fff (prio 0, i/o): tz-ppc-port[2]
000000004020a000-000000004020afff (prio 0, i/o): tz-ppc-port[3]
000000004020b000-000000004020bfff (prio 0, i/o): tz-ppc-port[4]
000000004020c000-000000004020cfff (prio 0, i/o): tz-ppc-port[12]
000000004020d000-000000004020dfff (prio 0, i/o): tz-ppc-port[13]
0000000040300000-0000000040300fff (prio 0, i/o): tz-ppc-port[0]
0000000040301000-0000000040301fff (prio 0, i/o): tz-ppc-port[1]
0000000040302000-0000000040302fff (prio 0, i/o): tz-ppc-port[2]
0000000041000000-000000004113ffff (prio 0, i/o): tz-ppc-port[0]
0000000042000000-00000000420000ff (prio 0, i/o): tz-ppc-port[5]
0000000048007000-0000000048007fff (prio -1000, i/o): FPGA NS PC
0000000050080000-0000000050080fff (prio 0, i/o): iotkit-secctl-s-regs
0000000058007000-0000000058007fff (prio 0, i/o): tz-ppc-port[0]
0000000058008000-0000000058008fff (prio 0, i/o): tz-ppc-port[1]
0000000058009000-0000000058009fff (prio 0, i/o): tz-ppc-port[2]
0000000080000000-0000000080ffffff (prio 0, ram): mps.ram
So as a quality of life feature lets expose the name of the underlying
region so we get something more useful:
0000000000000000-ffffffffffffffff (prio -2, i/o): system
0000000000000000-00000000003fffff (prio 0, i/o): tz-mpc-upstream
0000000000400000-00000000007fffff (prio 0, i/o): alias ssram-0-alias
@tz-mpc-upstream 0000000000000000-00000000003fffff
0000000028000000-00000000281fffff (prio 0, i/o): tz-mpc-upstream
0000000028200000-00000000283fffff (prio 0, i/o): tz-mpc-upstream
0000000040080000-0000000040080fff (prio 0, i/o): iotkit-secctl-ns-regs
0000000040100000-0000000040100fff (prio 0, i/o): tz-ppc-port[gpio0]
0000000040101000-0000000040101fff (prio 0, i/o): tz-ppc-port[gpio1]
0000000040102000-0000000040102fff (prio 0, i/o): tz-ppc-port[gpio2]
0000000040103000-0000000040103fff (prio 0, i/o): tz-ppc-port[gpio3]
0000000040110000-0000000040110fff (prio 0, i/o): tz-ppc-port[pl080]
0000000040111000-0000000040111fff (prio 0, i/o): tz-ppc-port[pl080]
0000000040112000-0000000040112fff (prio 0, i/o): tz-ppc-port[pl080]
0000000040113000-0000000040113fff (prio 0, i/o): tz-ppc-port[pl080]
0000000040200000-0000000040200fff (prio 0, i/o): tz-ppc-port[uart]
0000000040201000-0000000040201fff (prio 0, i/o): tz-ppc-port[uart]
0000000040202000-0000000040202fff (prio 0, i/o): tz-ppc-port[uart]
0000000040203000-0000000040203fff (prio 0, i/o): tz-ppc-port[uart]
0000000040204000-0000000040204fff (prio 0, i/o): tz-ppc-port[uart]
0000000040205000-0000000040205fff (prio 0, i/o): tz-ppc-port[pl022]
0000000040206000-0000000040206fff (prio 0, i/o): tz-ppc-port[pl022]
0000000040207000-0000000040207fff (prio 0, i/o):
tz-ppc-port[arm_sbcon_i2c]
0000000040208000-0000000040208fff (prio 0, i/o):
tz-ppc-port[arm_sbcon_i2c]
0000000040209000-0000000040209fff (prio 0, i/o): tz-ppc-port[pl022]
000000004020a000-000000004020afff (prio 0, i/o): tz-ppc-port[pl022]
000000004020b000-000000004020bfff (prio 0, i/o): tz-ppc-port[pl022]
000000004020c000-000000004020cfff (prio 0, i/o):
tz-ppc-port[arm_sbcon_i2c]
000000004020d000-000000004020dfff (prio 0, i/o):
tz-ppc-port[arm_sbcon_i2c]
0000000040300000-0000000040300fff (prio 0, i/o): tz-ppc-port[mps2-scc]
0000000040301000-0000000040301fff (prio 0, i/o): tz-ppc-port[i2s-audio]
0000000040302000-0000000040302fff (prio 0, i/o): tz-ppc-port[mps2-fpgaio]
0000000041000000-000000004113ffff (prio 0, i/o): tz-ppc-port[gfx]
0000000042000000-00000000420000ff (prio 0, i/o): tz-ppc-port[lan9118-mmio]
0000000048007000-0000000048007fff (prio -1000, i/o): FPGA NS PC
0000000050080000-0000000050080fff (prio 0, i/o): iotkit-secctl-s-regs
0000000058007000-0000000058007fff (prio 0, i/o): tz-ppc-port[tz-mpc-regs]
0000000058008000-0000000058008fff (prio 0, i/o): tz-ppc-port[tz-mpc-regs]
0000000058009000-0000000058009fff (prio 0, i/o): tz-ppc-port[tz-mpc-regs]
0000000080000000-0000000080ffffff (prio 0, ram): mps.ram
Signed-off-by: Alex Bennée <[email protected]>
Cc: Jim MacArthur <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
[PMD: Wrap long line to avoid checkpatch.pl warning]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: d6db93d8e19a46cf3d4eb621a63f50d3e0ee41c0
https://github.com/qemu/qemu/commit/d6db93d8e19a46cf3d4eb621a63f50d3e0ee41c0
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Replace target_ulong -> vaddr in hmp_gva2gpa()
cpu_get_phys_page_debug() takes a vaddr type since commit
00b941e581b ("cpu: Turn cpu_get_phys_page_debug() into a CPUClass
hook").
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Dr. David Alan Gilbert <[email protected]>
Message-Id: <[email protected]>
Commit: c46a13c505437999e60e7fc2052132dba43d7c3c
https://github.com/qemu/qemu/commit/c46a13c505437999e60e7fc2052132dba43d7c3c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Make memory_dump() @is_physical argument a boolean
Suggested-by: Dr. David Alan Gilbert <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Dr. David Alan Gilbert <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: 6ad593a75a89c32bb03184b68f9351a485dcf461
https://github.com/qemu/qemu/commit/6ad593a75a89c32bb03184b68f9351a485dcf461
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Use plain uint64_t @addr argument in memory_dump()
memory_dump() takes either hwaddr or vaddr type, depending
on the @is_physical argument. Simply use uint64_t type which
is common to both.
Pad address using field width formatting, removing the need
for the target_ulong type.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Dr. David Alan Gilbert <[email protected]>
Message-Id: <[email protected]>
Commit: c029aa102465171e44ab9b7956fc2dd93a8facfb
https://github.com/qemu/qemu/commit/c029aa102465171e44ab9b7956fc2dd93a8facfb
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Remove target_long uses in memory_dump()
Pass a plain vaddr type to express virtual address.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: 540be542d109ca00944c8229cc9be5b9582f9f60
https://github.com/qemu/qemu/commit/540be542d109ca00944c8229cc9be5b9582f9f60
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Inline ld[uw,l,q]_p() calls in memory_dump()
Remove the last target-specificity in this file.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: 8289e2528a7f9186b583d9115a49403beb80c578
https://github.com/qemu/qemu/commit/8289e2528a7f9186b583d9115a49403beb80c578
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M monitor/hmp-cmds-target.c
Log Message:
-----------
monitor/hmp: Fix coding style in hmp-cmds-target.c
Previous to moving code contained in hmp-cmds-target.c,
fix the coding style. Otherwise the checkpatch.pl script
would report:
ERROR: space required before the open parenthesis '('
#134: FILE: monitor/hmp-cmds-target.c:152:
+ switch(format) {
ERROR: braces {} are necessary for all arms of this statement
#154: FILE: monitor/hmp-cmds-target.c:172:
+ if (l > line_size)
[...]
ERROR: space required before the open parenthesis '('
#172: FILE: monitor/hmp-cmds-target.c:190:
+ switch(wsize) {
ERROR: space required before the open parenthesis '('
#188: FILE: monitor/hmp-cmds-target.c:206:
+ switch(format) {
ERROR: Don't use '#' flag of printf format ('%#') in format strings, use '0x'
prefix instead
#190: FILE: monitor/hmp-cmds-target.c:208:
+ monitor_printf(mon, "%#*" PRIo64, max_digits, v);
WARNING: line over 80 characters
#240: FILE: monitor/hmp-cmds-target.c:258:
+ error_setg(errp, "No memory is mapped at address 0x%" HWADDR_PRIx,
addr);
WARNING: line over 80 characters
#245: FILE: monitor/hmp-cmds-target.c:263:
+ error_setg(errp, "Memory at address 0x%" HWADDR_PRIx " is not RAM",
addr);
ERROR: Don't use '#' flag of printf format ('%#') in format strings, use '0x'
prefix instead
#297: FILE: monitor/hmp-cmds-target.c:315:
+ monitor_printf(mon, "gpa: %#" HWADDR_PRIx "\n",
WARNING: line over 80 characters
#329: FILE: monitor/hmp-cmds-target.c:347:
+ ret = ((pinfo & 0x007fffffffffffffull) * pagesize) | (addr & (pagesize -
1));
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Dr. David Alan Gilbert <[email protected]>
Message-Id: <[email protected]>
Commit: 26b4a6ffe7f6f60fe4e4eedbfa82846042aee6b8
https://github.com/qemu/qemu/commit/26b4a6ffe7f6f60fe4e4eedbfa82846042aee6b8
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
R monitor/hmp-cmds-target.c
M monitor/hmp-cmds.c
M monitor/meson.build
Log Message:
-----------
monitor/hmp: Merge hmp-cmds-target.c within hmp-cmds.c
hmp-cmds-target.c is no more target specific, move its code
in hmp-cmds.c, which is built once for all system binaries.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: bdae76b71fe0df0d37628d80aba9f83470bbc215
https://github.com/qemu/qemu/commit/bdae76b71fe0df0d37628d80aba9f83470bbc215
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/arm/Kconfig
M hw/usb/Kconfig
Log Message:
-----------
hw/arm/Kconfig: Have FSL_IMX6UL SoC select IMX_USBPHY
Since commit 17372bd812d, the SoC used by the mcimx6ul-evk
machine requires the IMX USB PHY component.
As this component is only used by 2 machines, do not select
it by default (it will be automatically selected when
necessary).
Fixes: 17372bd812d ("hw/arm/fsl-imx6ul: Wire up USB controllers")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: ea85af3e87453736f3d9996e333dbc4ae92b4d6d
https://github.com/qemu/qemu/commit/ea85af3e87453736f3d9996e333dbc4ae92b4d6d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/net/opencores_eth.c
Log Message:
-----------
hw/net/opencores: Clarify MMIO read/write handlers expect 32-bit access
The read/write handlers access array of 32-bit register by index:
277 struct OpenEthState {
..
287 uint32_t regs[REG_MAX];
..
291 };
546 static uint64_t open_eth_reg_read(void *opaque,
547 hwaddr addr, unsigned int size)
548 {
..
551 OpenEthState *s = opaque;
552 unsigned idx = addr / 4;
..
559 v = s->regs[idx];
..
563 return v;
564 }
This is a 32-bit implementation. Make that explicit in the
MemoryRegionOps structure (this doesn't change the maximum
access size, which -- being unset -- is 64-bit).
Move the structure just after the handlers to ease code review.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 56ae448867f2cc5cfdbf2c2b3bd0e4bcc16569ae
https://github.com/qemu/qemu/commit/56ae448867f2cc5cfdbf2c2b3bd0e4bcc16569ae
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/char/serial-mm.c
Log Message:
-----------
hw/char/serial: Let compiler pick serial_mm_ops[] array length
No need to enforce the MemoryRegionOps array length.
We index by device_endian enum, the compiler will easily
pick the correct length. Besides, this allow further
adjustments in the device_endian enum itself.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 5742fdb2635eb6d70479b68db1d0584cfc40d5d3
https://github.com/qemu/qemu/commit/5742fdb2635eb6d70479b68db1d0584cfc40d5d3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/misc/pvpanic.c
Log Message:
-----------
hw/misc/pvpanic: Expose MMIO interface as little-endian
Make the PVPanic MMIO interface behave like the ISA and PCI
variants: access it using little endianness.
Fixes: a89607c4d0e ("hw/misc/pvpanic: Add MMIO interface")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: 56f7e42c474fa9f9f409f37c0882be4149d8c427
https://github.com/qemu/qemu/commit/56f7e42c474fa9f9f409f37c0882be4149d8c427
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/timer/hpet.c
M rust/hw/timer/hpet/src/device.rs
Log Message:
-----------
hw/timer/hpet: Mark implementation as being little-endian
The HPET component is only built / used by X86 targets, which
are only built in little endianness. Thus we only ever built
as little endian, never testing the big-endian possibility of
the DEVICE_NATIVE_ENDIAN definition. Simplify by only keeping
the little endian variant.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Message-Id: <[email protected]>
Commit: c715efe2846f7dd734ba9570c0cad548282b4de5
https://github.com/qemu/qemu/commit/c715efe2846f7dd734ba9570c0cad548282b4de5
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/char/pl011.c
M rust/hw/char/pl011/src/device.rs
Log Message:
-----------
hw/char/pl011: Mark implementation as being little-endian
The PL011 component is only built / used by ARM targets, which
are only built in little endianness. Thus we only ever built
as little endian, never testing the big-endian possibility of
the DEVICE_NATIVE_ENDIAN definition. Simplify by only keeping
the little endian variant.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Message-Id: <[email protected]>
Commit: d97c8037bffeaeba0efa38c880ebfd7c898bf7b5
https://github.com/qemu/qemu/commit/d97c8037bffeaeba0efa38c880ebfd7c898bf7b5
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M rust/system/src/memory.rs
Log Message:
-----------
rust/system: Stop exposing bogus DEVICE_NATIVE_ENDIAN symbol
We want to remove the bogus DEVICE_NATIVE_ENDIAN definition
(by only having it explicit, either big or little one). Stop
exposing it to rust devices to avoid it spreading further.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Message-Id: <[email protected]>
Commit: 3f76eeb4b4ae2ce3d296e4c26a8b1918108cb31e
https://github.com/qemu/qemu/commit/3f76eeb4b4ae2ce3d296e4c26a8b1918108cb31e
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M target/hexagon/internal.h
Log Message:
-----------
target/hexagon: Include missing 'cpu.h' header in 'internal.h'
Both CPUHexagonState and TOTAL_PER_THREAD_REGS are defined
in "cpu.h" which is luckily indirectly included. However when
refactoring unrelated files we get:
In file included from target/hexagon/helper.h:18,
from include/exec/helper-proto.h.inc:56,
from include/exec/helper-proto.h:13,
from target/hexagon/op_helper.c:22:
target/hexagon/internal.h: At top level:
target/hexagon/internal.h:29:25: error: unknown type name ‘CPUHexagonState’;
did you mean ‘CPUPluginState’?
29 | void hexagon_debug_vreg(CPUHexagonState *env, int regnum);
| ^~~~~~~~~~~~~~~
| CPUPluginState
target/hexagon/internal.h:30:25: error: unknown type name ‘CPUHexagonState’;
did you mean ‘CPUPluginState’?
30 | void hexagon_debug_qreg(CPUHexagonState *env, int regnum);
| ^~~~~~~~~~~~~~~
| CPUPluginState
target/hexagon/internal.h:31:20: error: unknown type name ‘CPUHexagonState’;
did you mean ‘CPUPluginState’?
31 | void hexagon_debug(CPUHexagonState *env);
| ^~~~~~~~~~~~~~~
| CPUPluginState
target/hexagon/internal.h:33:44: error: ‘TOTAL_PER_THREAD_REGS’ undeclared
here (not in a function)
33 | extern const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS];
| ^~~~~~~~~~~~~~~~~~~~~
Fix that by including the missing header.
We don't need the "qemu/log.h" since commit 0cb73cb5a02 ("target/hexagon:
Remove HEX_DEBUG/HEX_DEBUG_LOG"): remove it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Acked-by: Matheus Tavares Bernardino <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Message-Id: <[email protected]>
Commit: a24151dec6532993946a8b88c4dd0cbbb037d176
https://github.com/qemu/qemu/commit/a24151dec6532993946a8b88c4dd0cbbb037d176
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M target/i386/cpu.h
M target/i386/helper.c
Log Message:
-----------
target/i386: Remove x86_stl_phys_notdirty() leftover
Last use of x86_stl_phys_notdirty() was removed in commit 4a1e9d4d11c
("target/i386: Use atomic operations for pte updates"), let's remove.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Message-Id: <[email protected]>
Commit: a58ced9649c35dc909ae534dd1e8645d3d1f1fda
https://github.com/qemu/qemu/commit/a58ced9649c35dc909ae534dd1e8645d3d1f1fda
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M target/sparc/mmu_helper.c
Log Message:
-----------
target/sparc: Update MMU page table using stl_phys()
stl_phys_notdirty() is supposed to do an optimized CODE
path store. Here we update the page table via the DATA
path, so can use the normal stl_phys() helper.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 3800f80624747bc1a4e0ae7f488175c7f3d2ac57
https://github.com/qemu/qemu/commit/3800f80624747bc1a4e0ae7f488175c7f3d2ac57
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/arm/aspeed.c
M hw/arm/boot.c
Log Message:
-----------
hw/arm: Avoid address_space_stl_notdirty() when generating bootloader
When using the '-kernel' command line option, a bootloader is
emitted, calling address_space_stl_notdirty().
The _notdirty() variant is supposed to /not/ mark the updated
CODE page as dirty, to not re-translate it. However this code
is only used with the '-kernel' CLI option after the machine
is created and /before/ the vCPUs run, and *only* during the
first (cold) reset; not during following (hot) resets. The
optimisation is totally not justified, since we haven't
translated any guest code yet.
Replace by the normal address_space_stl() helper.
Suggested-by: Richard Henderson <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: f717405be607a657dd0ce1c8d8ac044de9870432
https://github.com/qemu/qemu/commit/f717405be607a657dd0ce1c8d8ac044de9870432
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M include/system/memory.h
M include/system/memory_ldst.h.inc
M system/memory_ldst.c.inc
Log Message:
-----------
system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty
stl_phys_notdirty() was added in commit 8df1cd076cc ("physical memory
access functions") as a (premature?) optimisation for the CODE path.
Meanwhile 20 years passed, we might never have understood / used it
properly; the code evolved and now the recommended way to access the
CODE path is via the cpu_ld/st_mmu*() API.
Remove both address_space_stl_notdirty() and stl_phys_notdirty()
leftovers.
Suggested-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: f4ea95c9ad826859e7dbfd9e0d19c39ffafdd652
https://github.com/qemu/qemu/commit/f4ea95c9ad826859e7dbfd9e0d19c39ffafdd652
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M include/system/memory.h
M scripts/make-config-poison.sh
Log Message:
-----------
system/memory: Allow restricting legacy ldst_phys() API usage
Commit 500131154d6 ("exec.c: Add new address_space_ld*/st*
functions") added a new API to fix a shortcoming of the
ld/st*_phys() API, which does blind bus access, not reporting
failure (and it also allow to provide transaction attributes).
Later commit 42874d3a8c6 ("Switch non-CPU callers from ld/st*_phys
to address_space_ld/st*") automatically converted the legacy uses
to the new API, not precising transaction attributes
(MEMTXATTRS_UNSPECIFIED) and ignoring the transation result (passing
NULL pointer as MemTxResult).
While this is a faithful replacement, without any logical change,
we later realized better is to not use MEMTXATTRS_UNSPECIFIED or
NULL MemTxResult, and adapt each call site on a pair basis, looking
at the device model datasheet to do the correct behavior (which is
unlikely to ignore transaction failures).
Since this is quite some work, we defer that to device model
maintainers. Meanwhile we introduce a definition, to allow a
target which removed all legacy API call to prohibit further
legacy API uses, named "TARGET_NOT_USING_LEGACY_LDST_PHYS_API".
Since all targets should be able to check this definition, we
take care to not poison it.
Suggested-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 0b223b17fefd1186edf5785794f74154c869e3a7
https://github.com/qemu/qemu/commit/0b223b17fefd1186edf5785794f74154c869e3a7
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M configs/targets/avr-softmmu.mak
M configs/targets/microblaze-softmmu.mak
M configs/targets/microblazeel-softmmu.mak
M configs/targets/rx-softmmu.mak
M configs/targets/tricore-softmmu.mak
Log Message:
-----------
configs/targets: Mark targets not using legacy ldst_phys() API
Luckily these targets don't use the legacy ldst_phys() API at
all. Set the TARGET_NOT_USING_LEGACY_LDST_PHYS_API variable to
hide the API to them, avoiding further API uses to creep in.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: dacddc530486bbdcaab1ec1dacf72b89da1a27e8
https://github.com/qemu/qemu/commit/dacddc530486bbdcaab1ec1dacf72b89da1a27e8
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M include/hw/virtio/virtio-access.h
Log Message:
-----------
hw/virtio: Remove unused ldst_phys() helpers
None of the following virtio ldst_phys() inlined helpers are used:
- virtio_lduw_phys()
- virtio_ldl_phys[_cached]()
- virtio_ldq_phys[_cached]()
- virtio_stw_phys()
- virtio_stl_phys[_cached]()
Just remove them.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 383112976b01b1d6453e678dd41a2aaa306f8dcd
https://github.com/qemu/qemu/commit/383112976b01b1d6453e678dd41a2aaa306f8dcd
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/virtio/virtio.c
M include/hw/virtio/virtio-access.h
Log Message:
-----------
hw/virtio: Reduce virtio_lduw/stw_phys_cached() scope
virtio_lduw_phys_cached() and virtio_stw_phys_cached() are
only used within hw/virtio/virtio.c: reduce their scope by
moving their definitions there.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 0f9150b250b9b629214899cb339ffae3746d5591
https://github.com/qemu/qemu/commit/0f9150b250b9b629214899cb339ffae3746d5591
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M configs/targets/mips-softmmu.mak
M configs/targets/mips64-softmmu.mak
M configs/targets/mips64el-softmmu.mak
M configs/targets/mipsel-softmmu.mak
M configs/targets/or1k-softmmu.mak
M configs/targets/riscv32-softmmu.mak
M configs/targets/riscv64-softmmu.mak
M configs/targets/sh4-softmmu.mak
M configs/targets/sh4eb-softmmu.mak
M configs/targets/sparc64-softmmu.mak
M configs/targets/xtensa-softmmu.mak
M configs/targets/xtensaeb-softmmu.mak
Log Message:
-----------
configs/targets: Mark targets not using legacy ldst_phys() API
These targets were only using the legacy ldst_phys() API
via the virtio load/store helpers, which got cleaned up.
Mark them not using the legacy ldst_phys() API to avoid
further use, allowing to eventually remove it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: c1df49269a1a3b33073c2c17a269dcf0f5e423e9
https://github.com/qemu/qemu/commit/c1df49269a1a3b33073c2c17a269dcf0f5e423e9
Author: Nguyen Dinh Phi <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M meson.build
M qga/vss-win32/install.cpp
Log Message:
-----------
qga/vss-win32: Fix ConvertStringToBSTR redefinition with newer MinGW
Newer versions of MinGW-w64 provide ConvertStringToBSTR() in the
_com_util namespace via <comutil.h>. This causes a redefinition
error when building qemu-ga on Windows with these toolchains.
Add a meson check to detect whether ConvertStringToBSTR is already
available, and conditionally compile our fallback implementation
only when the system does not provide one.
Signed-off-by: Nguyen Dinh Phi <[email protected]>
Suggested-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Kostiantyn Kostiuk <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0c9f429ec8bfa734fb4a85412c9d2c4a2de03128
https://github.com/qemu/qemu/commit/0c9f429ec8bfa734fb4a85412c9d2c4a2de03128
Author: Nguyen Dinh Phi <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M block/file-win32.c
M util/oslib-win32.c
Log Message:
-----------
util: Move qemu_ftruncate64 from block/file-win32.c to oslib-win32.c
qemu_ftruncate64() is a general-purpose utility function that may be
used outside of the block layer. Move it to util/oslib-win32.c where
other Windows-specific utility functions reside.
Signed-off-by: Nguyen Dinh Phi <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 3fbadbb3927a92db1932baee0c1188b05c0ac6b1
https://github.com/qemu/qemu/commit/3fbadbb3927a92db1932baee0c1188b05c0ac6b1
Author: Alano Song <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M hw/i2c/imx_i2c.c
Log Message:
-----------
hw/i2c/imx: Fix trace func name error
Signed-off-by: Alano Song <[email protected]>
Fixes: e589c0ea9c9 ("hw/i2c/imx_i2c: Convert DPRINTF() to trace events")
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 981a5a5c88965c48fac916e56d6b8709c0c60508
https://github.com/qemu/qemu/commit/981a5a5c88965c48fac916e56d6b8709c0c60508
Author: Bin Guo <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M meson.build
Log Message:
-----------
meson: Optimize summary_info about directories
Clear summary_info first, otherwise there will be redundant output
about build environment.
Signed-off-by: Bin Guo <[email protected]>
Tested-by: Alex Bennée <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0057d7fac9432fd0636166a64430c3accab6832b
https://github.com/qemu/qemu/commit/0057d7fac9432fd0636166a64430c3accab6832b
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: remove old email for Bandan Das
Bandan recently left Red Hat and emails to his old address now result in
bounce messages. I contacted Bandan and he asked me to remove his old
address on his behalf.
Reported-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 4bd2b65e524836fef274fd169db804a2efce8836
https://github.com/qemu/qemu/commit/4bd2b65e524836fef274fd169db804a2efce8836
Author: Bastian Koppelmann <[email protected]>
Date: 2025-12-30 (Tue, 30 Dec 2025)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Change email and status of TriCore
I'm no longer employed at the university of Paderborn. This also means
my time available for QEMU has reduced significantly. Thus, I'm dropping
the status to odd fixes.
Signed-off-by: Bastian Koppelmann <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 667e1fff878326c35c7f5146072e60a63a9a41c8
https://github.com/qemu/qemu/commit/667e1fff878326c35c7f5146072e60a63a9a41c8
Author: Richard Henderson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M MAINTAINERS
M block/file-win32.c
M configs/targets/avr-softmmu.mak
M configs/targets/microblaze-softmmu.mak
M configs/targets/microblazeel-softmmu.mak
M configs/targets/mips-softmmu.mak
M configs/targets/mips64-softmmu.mak
M configs/targets/mips64el-softmmu.mak
M configs/targets/mipsel-softmmu.mak
M configs/targets/or1k-softmmu.mak
M configs/targets/riscv32-softmmu.mak
M configs/targets/riscv64-softmmu.mak
M configs/targets/rx-softmmu.mak
M configs/targets/sh4-softmmu.mak
M configs/targets/sh4eb-softmmu.mak
M configs/targets/sparc64-softmmu.mak
M configs/targets/tricore-softmmu.mak
M configs/targets/xtensa-softmmu.mak
M configs/targets/xtensaeb-softmmu.mak
M hw/arm/Kconfig
M hw/arm/aspeed.c
M hw/arm/boot.c
M hw/char/pl011.c
M hw/char/serial-mm.c
M hw/i2c/imx_i2c.c
M hw/misc/pvpanic.c
M hw/misc/tz-ppc.c
M hw/net/opencores_eth.c
M hw/riscv/boot.c
M hw/riscv/microchip_pfsoc.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M hw/sd/ssi-sd.c
M hw/timer/hpet.c
M hw/usb/Kconfig
M hw/virtio/virtio.c
M include/hw/riscv/boot.h
M include/hw/virtio/virtio-access.h
M include/system/memory.h
M include/system/memory_ldst.h.inc
M meson.build
R monitor/hmp-cmds-target.c
M monitor/hmp-cmds.c
M monitor/meson.build
M qga/vss-win32/install.cpp
M rust/hw/char/pl011/src/device.rs
M rust/hw/timer/hpet/src/device.rs
M rust/system/src/memory.rs
M scripts/make-config-poison.sh
M system/memory_ldst.c.inc
M system/vl.c
M target/hexagon/internal.h
M target/i386/cpu.h
M target/i386/helper.c
M target/sparc/mmu_helper.c
M util/oslib-win32.c
Log Message:
-----------
Merge tag 'hw-misc-20251230' of https://github.com/philmd/qemu into staging
Misc HW patches
- Remove few target_ulong uses
- Make human monitor non-target specific
- Better name for TrustZone Peripheral Protection Controller memory regions
- Do not expose DEVICE_NATIVE_ENDIAN on Rust
- Remove address_space_stl_notdirty() and stl_phys_notdirty()
- Allow to restrict targets to legacy ldst_phys() API
- Fix MinGW-w64 link failure due to ConvertStringToBSTR()
- Header cleanups
- MAINTAINERS updates
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[unknown]
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* tag 'hw-misc-20251230' of https://github.com/philmd/qemu: (34 commits)
MAINTAINERS: Change email and status of TriCore
MAINTAINERS: remove old email for Bandan Das
meson: Optimize summary_info about directories
hw/i2c/imx: Fix trace func name error
util: Move qemu_ftruncate64 from block/file-win32.c to oslib-win32.c
qga/vss-win32: Fix ConvertStringToBSTR redefinition with newer MinGW
configs/targets: Mark targets not using legacy ldst_phys() API
hw/virtio: Reduce virtio_lduw/stw_phys_cached() scope
hw/virtio: Remove unused ldst_phys() helpers
configs/targets: Mark targets not using legacy ldst_phys() API
system/memory: Allow restricting legacy ldst_phys() API usage
system/memory: Remove address_space_stl_notdirty and stl_phys_notdirty
hw/arm: Avoid address_space_stl_notdirty() when generating bootloader
target/sparc: Update MMU page table using stl_phys()
target/i386: Remove x86_stl_phys_notdirty() leftover
target/hexagon: Include missing 'cpu.h' header in 'internal.h'
rust/system: Stop exposing bogus DEVICE_NATIVE_ENDIAN symbol
hw/char/pl011: Mark implementation as being little-endian
hw/timer/hpet: Mark implementation as being little-endian
hw/misc/pvpanic: Expose MMIO interface as little-endian
...
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/942b0d378a1d...667e1fff8783
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