On 2023/10/24 07:26, Richard Henderson wrote:
On 10/23/23 08:29, Jiajie Chen wrote:
This patch series implements the new instructions except sc.q,
because I do not know how to match a pair of ll.d to sc.q.
There are a couple of examples within the tree.
See target/arm/tcg/translate-a64.c, gen_store_exclusive, TCGv_i128 block.
See target/ppc/translate.c, gen_stqcx_.
The situation here is slightly different: aarch64 and ppc64 have both
128-bit ll and sc, however LoongArch v1.1 only has 64-bit ll and 128-bit
sc. I guest the intended usage of sc.q is:
ll.d lo, base, 0
ll.d hi, base, 4
# do some computation
sc.q lo, hi, base
# try again if sc failed
r~
