On Thu, 16 Nov 2023 at 17:28, Ben Dooks <ben.do...@codethink.co.uk> wrote: > > The ICC_PMR_ELx and ICV_PMR_ELx bit masks returned from > ic{c,v}_fullprio_mask should technically also remove any > bit above 7 as these are marked reserved (read 0) and should > therefore should not be written as anything other than 0. > > This was noted during a run of a proprietary test system and > discused on the mailing list [1] and initially thought not to > be an issue due to RES0 being technically allowed to be > written to and read back as long as the implementation does > not use the RES0 bits. It is very possible that the values > are used in comparison without masking, as pointed out by > Peter in [2], if (cs->hppi.prio >= cs->icc_pmr_el1) may well > do the wrong thing. > > Masking these values in ic{c,v}_fullprio_mask() should fix > this and prevent any future problems with playing with the > values. > > [1]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00607.html > [2]: https://lists.nongnu.org/archive/html/qemu-arm/2023-11/msg00737.html > > Signed-off-by: Ben Dooks <ben.do...@codethink.co.uk> > Suggested-by: Peter Maydell <peter.mayd...@linaro.org>
Applied to target-arm.next, thanks. -- PMM