On Wed, 10 Jan 2024 at 23:42, Nabih Estefan <nabiheste...@google.com> wrote:
>
> From: Nabih Estefan Diaz <nabiheste...@google.com>
>
> - Implementation of Receive function for packets
> - Implementation for reading and writing from and to descriptors in
>   memory for Rx
>
> When RX starts, we need to flush the queued packets so that they
> can be received by the GMAC device. Without this it won't work
> with TAP NIC device.
>
> When RX descriptor list is full, it returns a DMA_STATUS for software
> to handle it. But there's no way to indicate the software has
> handled all RX descriptors and the whole pipeline stalls.
>
> We do something similar to NPCM7XX EMC to handle this case.
>
> 1. Return packet size when RX descriptor is full, effectively
> dropping these packets in such a case.
> 2. When software clears RX descriptor full bit, continue receiving
> further packets by flushing QEMU packet queue.
>
> Added relevant trace-events
>


> +static int gmac_read_tx_desc(dma_addr_t addr, struct NPCMGMACTxDesc *desc)
> +{
> +    if (dma_memory_read(&address_space_memory, addr, desc,
> +                        sizeof(*desc), MEMTXATTRS_UNSPECIFIED)) {
> +        qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to read descriptor @ 0x%"
> +                      HWADDR_PRIx "\n", __func__, addr);
> +        return -1;
> +    }
> +    desc->tdes0 = le32_to_cpu(desc->tdes0);
> +    desc->tdes1 = le32_to_cpu(desc->tdes1);
> +    desc->tdes2 = le32_to_cpu(desc->tdes2);
> +    desc->tdes3 = le32_to_cpu(desc->tdes3);
> +    return 0;
> +}
> +
> +static int gmac_write_tx_desc(dma_addr_t addr, struct NPCMGMACTxDesc *desc)
> +{
> +    struct NPCMGMACTxDesc le_desc;
> +    le_desc.tdes0 = cpu_to_le32(desc->tdes0);
> +    le_desc.tdes1 = cpu_to_le32(desc->tdes1);
> +    le_desc.tdes2 = cpu_to_le32(desc->tdes2);
> +    le_desc.tdes3 = cpu_to_le32(desc->tdes3);
> +    if (dma_memory_write(&address_space_memory, addr, &le_desc,
> +                        sizeof(le_desc), MEMTXATTRS_UNSPECIFIED)) {
> +        qemu_log_mask(LOG_GUEST_ERROR, "%s: Failed to write descriptor @ 0x%"
> +                      HWADDR_PRIx "\n", __func__, addr);
> +        return -1;
> +    }
> +    return 0;
> +}

The series doesn't compile at this point, because:
../../hw/net/npcm_gmac.c:238:12: error: unused function
'gmac_read_tx_desc' [-Werror,-Wunused-function]
static int gmac_read_tx_desc(dma_addr_t addr, struct NPCMGMACTxDesc *desc)
           ^
../../hw/net/npcm_gmac.c:253:12: error: unused function
'gmac_write_tx_desc' [-Werror,-Wunused-function]
static int gmac_write_tx_desc(dma_addr_t addr, struct NPCMGMACTxDesc *desc)
           ^

(this might be a clang-only warning).

The fix is to move these two function definitions into
the following patch, where we add the code that uses them.

-- PMM

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