On 1/23/24 08:10, Rob Bradford wrote:
Expose the newly added extensions to the guest and allow their control through the CPU properties. Signed-off-by: Rob Bradford <rbradf...@rivosinc.com> ---
Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
target/riscv/cpu.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8d3ec74a1c..604baf53c8 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -103,7 +103,9 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(zihintpause, PRIV_VERSION_1_10_0, ext_zihintpause), ISA_EXT_DATA_ENTRY(zihpm, PRIV_VERSION_1_12_0, ext_zihpm), ISA_EXT_DATA_ENTRY(zmmul, PRIV_VERSION_1_12_0, ext_zmmul), + ISA_EXT_DATA_ENTRY(zaamo, PRIV_VERSION_1_12_0, ext_zaamo), ISA_EXT_DATA_ENTRY(zacas, PRIV_VERSION_1_12_0, ext_zacas), + ISA_EXT_DATA_ENTRY(zalrsc, PRIV_VERSION_1_12_0, ext_zalrsc), ISA_EXT_DATA_ENTRY(zawrs, PRIV_VERSION_1_12_0, ext_zawrs), ISA_EXT_DATA_ENTRY(zfa, PRIV_VERSION_1_12_0, ext_zfa), ISA_EXT_DATA_ENTRY(zfbfmin, PRIV_VERSION_1_12_0, ext_zfbfmin), @@ -1491,6 +1493,9 @@ const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { MULTI_EXT_CFG_BOOL("x-smaia", ext_smaia, false), MULTI_EXT_CFG_BOOL("x-ssaia", ext_ssaia, false),+ MULTI_EXT_CFG_BOOL("x-zaamo", ext_zaamo, false),+ MULTI_EXT_CFG_BOOL("x-zalrsc", ext_zalrsc, false), + MULTI_EXT_CFG_BOOL("x-zvfh", ext_zvfh, false), MULTI_EXT_CFG_BOOL("x-zvfhmin", ext_zvfhmin, false),
