Shiyang Ruan wrote: > The length of Physical Address in General Media Event Record/DRAM Event > Record is 64-bit, so the field mask should be defined as such length. > Otherwise, this causes cxl_general_media and cxl_dram tracepoints to > mask off the upper-32-bits of DPA addresses. The cxl_poison event is > unaffected. > > If userspace was doing its own DPA-to-HPA translation this could lead to > incorrect page retirement decisions, but there is no known consumer > (like rasdaemon) of this event today. > > Fixes: d54a531a430b ("cxl/mem: Trace General Media Event Record") > Cc: <sta...@vger.kernel.org> > Cc: Dan Williams <dan.j.willi...@intel.com> > Cc: Davidlohr Bueso <d...@stgolabs.net> > Cc: Jonathan Cameron <jonathan.came...@huawei.com> > Cc: Ira Weiny <ira.we...@intel.com>
Apologies I thought I saw this go in before. But perhaps it was a different mask. Reviewed-by: Ira Weiny <ira.we...@intel.com> > Signed-off-by: Shiyang Ruan <ruansy.f...@fujitsu.com> > --- > drivers/cxl/core/trace.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/cxl/core/trace.h b/drivers/cxl/core/trace.h > index e5f13260fc52..cdfce932d5b1 100644 > --- a/drivers/cxl/core/trace.h > +++ b/drivers/cxl/core/trace.h > @@ -253,7 +253,7 @@ TRACE_EVENT(cxl_generic_event, > * DRAM Event Record > * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44 > */ > -#define CXL_DPA_FLAGS_MASK 0x3F > +#define CXL_DPA_FLAGS_MASK 0x3FULL > #define CXL_DPA_MASK (~CXL_DPA_FLAGS_MASK) > > #define CXL_DPA_VOLATILE BIT(0) > -- > 2.34.1 >