Hi Eric, > -----Original Message----- > From: Eric Auger <[email protected]> > Sent: Wednesday, November 20, 2024 4:11 PM > To: Shameerali Kolothum Thodi > <[email protected]>; [email protected]; > [email protected] > Cc: [email protected]; [email protected]; [email protected]; > [email protected]; Linuxarm <[email protected]>; Wangzhou (B) > <[email protected]>; jiangkunkun <[email protected]>; > Jonathan Cameron <[email protected]>; > [email protected] > Subject: Re: [RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with > multiple SMMU nodes > > Hi Shameer, > > On 11/20/24 15:16, Shameerali Kolothum Thodi wrote: > > > >> -----Original Message----- > >> From: Eric Auger <[email protected]> > >> Sent: Monday, November 18, 2024 6:10 PM > >> To: Shameerali Kolothum Thodi > >> <[email protected]>; [email protected]; > >> [email protected] > >> Cc: [email protected]; [email protected]; [email protected]; > >> [email protected]; Linuxarm <[email protected]>; Wangzhou (B) > >> <[email protected]>; jiangkunkun <[email protected]>; > >> Jonathan Cameron <[email protected]>; > >> [email protected] > >> Subject: Re: [RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with > >> multiple SMMU nodes > > [...] > > > >>> I think the above won't affect the basic case where I have only one > >>> pcie-pxb/SMMUv3. But even in that case hot add seems not working. > >>> > >>> I tried hacking the min/max ranges as suspected by Nicolin. But still not > >> enough to > >>> get it working. Do you have any hint on why the hot add(described > >> below) is not > >>> working? > >> Hum thought the duplicate idmap could be the cause. Otherwise I have > no > >> clue. I would advice to fix it first. > > I think I have an idea why the hot add was not working. > > > > When we have the PCIe topology as something like below, > > > > -device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \ > > -device pcie-root-port,id=pcie.port1,bus=pcie.1,chassis=1 \ > > -device pcie-root-port,id=pcie.port2,bus=pcie.1,chassis=2 \ > > -device arm-smmuv3-nested,id=smmuv1,pci-bus=pcie.1 \ > > ... > > > > The current IORT generation includes the pcie-root-port dev ids also > > in the SMMUv3 node idmaps. > > > > Hence, when Guest kernel loads, pcieport is also behind the SMMUv3. > > > > [ 1.466670] pcieport 0000:64:00.0: Adding to iommu group 1 > > ... > > [ 1.448205] pcieport 0000:64:01.0: Adding to iommu group 2 > > But it should be the same without multi-instantiation, no? I would have > expected this as normal. Has you tested hot-plug without the series > laterly? Do you have the same pb?
That is a good question. I will give it a try soon and update. Thanks, Shameer.
