On 1/10/25 17:09, Philippe Mathieu-Daudé wrote:
On 10/1/25 15:17, Cédric Le Goater wrote:
Since the 405 CPU family was phased out, these instructions have no
users anymore.
Signed-off-by: Cédric Le Goater <c...@redhat.com>
---
target/ppc/cpu.h | 6 +-----
target/ppc/translate.c | 11 -----------
2 files changed, 1 insertion(+), 16 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 504924f10561..f83f01a62a12 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2234,9 +2234,7 @@ void ppc_compat_add_property(Object *obj, const char
*name,
#define SPR_L3CR (0x3FA)
#define SPR_750_TDCH (0x3FA)
#define SPR_IABR2 (0x3FA)
-#define SPR_40x_DCCR (0x3FA)
#define SPR_ICTC (0x3FB)
-#define SPR_40x_ICCR (0x3FB)
#define SPR_THRM1 (0x3FC)
#define SPR_403_PBL1 (0x3FC)
#define SPR_SP (0x3FD)
Belong to patch #3?
It could. These are the Data and Instruction Cache Cachability
Register, so they could stay in this patch too.
Thanks,
C.
