On Fri, Jun 6, 2025 at 7:29 PM Zhenzhong Duan <zhenzhong.d...@intel.com> wrote:
>
> RISCVIOMMUPciClass and RISCVIOMMUSysClass are defined with missed
> parent class, class_init on them may corrupt their parent class
> fields.
>
> It's lucky that parent_realize and parent_phases are not initialized
> or used until now, so just remove the definitions. They can be added
> back when really necessary.
>
> Signed-off-by: Zhenzhong Duan <zhenzhong.d...@intel.com>
> Reviewed-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>
Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> include/hw/riscv/iommu.h | 6 ++----
> hw/riscv/riscv-iommu-pci.c | 6 ------
> hw/riscv/riscv-iommu-sys.c | 6 ------
> 3 files changed, 2 insertions(+), 16 deletions(-)
>
> diff --git a/include/hw/riscv/iommu.h b/include/hw/riscv/iommu.h
> index b03339d75c..8a8acfc3f0 100644
> --- a/include/hw/riscv/iommu.h
> +++ b/include/hw/riscv/iommu.h
> @@ -30,14 +30,12 @@ typedef struct RISCVIOMMUState RISCVIOMMUState;
> typedef struct RISCVIOMMUSpace RISCVIOMMUSpace;
>
> #define TYPE_RISCV_IOMMU_PCI "riscv-iommu-pci"
> -OBJECT_DECLARE_TYPE(RISCVIOMMUStatePci, RISCVIOMMUPciClass, RISCV_IOMMU_PCI)
> +OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStatePci, RISCV_IOMMU_PCI)
> typedef struct RISCVIOMMUStatePci RISCVIOMMUStatePci;
> -typedef struct RISCVIOMMUPciClass RISCVIOMMUPciClass;
>
> #define TYPE_RISCV_IOMMU_SYS "riscv-iommu-device"
> -OBJECT_DECLARE_TYPE(RISCVIOMMUStateSys, RISCVIOMMUSysClass, RISCV_IOMMU_SYS)
> +OBJECT_DECLARE_SIMPLE_TYPE(RISCVIOMMUStateSys, RISCV_IOMMU_SYS)
> typedef struct RISCVIOMMUStateSys RISCVIOMMUStateSys;
> -typedef struct RISCVIOMMUSysClass RISCVIOMMUSysClass;
>
> #define FDT_IRQ_TYPE_EDGE_LOW 1
>
> diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
> index 1f44eef74e..cdb4a7a8f0 100644
> --- a/hw/riscv/riscv-iommu-pci.c
> +++ b/hw/riscv/riscv-iommu-pci.c
> @@ -68,12 +68,6 @@ typedef struct RISCVIOMMUStatePci {
> RISCVIOMMUState iommu; /* common IOMMU state */
> } RISCVIOMMUStatePci;
>
> -struct RISCVIOMMUPciClass {
> - /*< public >*/
> - DeviceRealize parent_realize;
> - ResettablePhases parent_phases;
> -};
> -
> /* interrupt delivery callback */
> static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector)
> {
> diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c
> index 74e76b94a5..e34d00aef6 100644
> --- a/hw/riscv/riscv-iommu-sys.c
> +++ b/hw/riscv/riscv-iommu-sys.c
> @@ -53,12 +53,6 @@ struct RISCVIOMMUStateSys {
> uint8_t *msix_pba;
> };
>
> -struct RISCVIOMMUSysClass {
> - /*< public >*/
> - DeviceRealize parent_realize;
> - ResettablePhases parent_phases;
> -};
> -
> static uint64_t msix_table_mmio_read(void *opaque, hwaddr addr,
> unsigned size)
> {
> --
> 2.34.1
>
>
