GPIO series:
Added 32 bits property for ASPEED GPIO with updated qtests.
SGPIO series:
Implemented SGPIO device according for npcm8xx.
Two notable implementations left undone in these patches are:
1. Reading the data from the host controlled SIOX via register IOXDATR
2. On-demand with polling reading node
The reason for this ommitance is that both features are currently
unused/umimplemented by the nuvoton driver.
The changes to qobject is used in both sets of patches. The patch series
implements indexing gpios with array indices on top of accessing with registers.
The reasons for this is becasue it creates another easier way to access gpio.
In our internal tests, we model complex behaviors with a large number of gpios,
such as in fault injection, or in networking behaviors.
Indexing multiple gpios at once allows qmp/side band client no longer hardcode
and populate register names and manipulate them faster.
Updates since V0: added more descriptions on qobjects change in cover letter.
Coco Li (3):
hw/arm/npcm8xx.c: Add all IRQ ENUMs
hw/gpio/npcm8xx: Implement SIOX (SPGIO) device for NPCM without input
pin logic
hw/gpio/npcm8xx: Implement npcm sgpio device input pin logic
Felix Wu (2):
hw/gpio: Add property for ASPEED GPIO in 32 bits basis
tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
hw/arm/npcm8xx.c | 66 +++-
hw/gpio/aspeed_gpio.c | 57 ++++
hw/gpio/meson.build | 1 +
hw/gpio/npcm8xx_sgpio.c | 533 +++++++++++++++++++++++++++++++
hw/gpio/trace-events | 4 +
include/hw/arm/npcm8xx.h | 2 +
include/hw/gpio/npcm8xx_sgpio.h | 45 +++
include/qobject/qdict.h | 1 +
qobject/qdict.c | 13 +
tests/qtest/aspeed_gpio-test.c | 105 +++++-
tests/qtest/meson.build | 3 +-
tests/qtest/npcm8xx_sgpio-test.c | 222 +++++++++++++
12 files changed, 1039 insertions(+), 13 deletions(-)
create mode 100644 hw/gpio/npcm8xx_sgpio.c
create mode 100644 include/hw/gpio/npcm8xx_sgpio.h
create mode 100644 tests/qtest/npcm8xx_sgpio-test.c
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2.51.0.536.g15c5d4f767-goog
