On 10/1/25 12:32 AM, Anton Johansson wrote:
In hw/ the relevant RISCVIMSICState fields
eidelivery, eithreshold, eistate are uint32_t.
Signed-off-by: Anton Johansson <[email protected]>
---
target/riscv/cpu.h | 42 ++++++++++++++++++++-------------------
hw/intc/riscv_imsic.c | 34 +++++++++++++++----------------
target/riscv/cpu_helper.c | 12 ++++-------
target/riscv/csr.c | 24 ++++++++++++----------
4 files changed, 57 insertions(+), 55 deletions(-)
Fix + refactor, but it's ok to read.
Reviewed-by: Pierrick Bouvier <[email protected]>