On 9/18/25 3:19 AM, LIU Zhiwei wrote:
Co-authored-by: Huang Tao <[email protected]> Co-authored-by: TANG Tiancheng <[email protected]> Signed-off-by: LIU Zhiwei <[email protected]> ---
Reviewed-by: Daniel Henrique Barboza <[email protected]>
target/riscv/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ad5597c9ac..959024a0c5 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -204,8 +204,10 @@ const RISCVIsaExtData isa_edata_arr[] = { ISA_EXT_DATA_ENTRY(smdbltrp, PRIV_VERSION_1_13_0, ext_smdbltrp), ISA_EXT_DATA_ENTRY(smepmp, PRIV_VERSION_1_12_0, ext_smepmp), ISA_EXT_DATA_ENTRY(smmpm, PRIV_VERSION_1_13_0, ext_smmpm), + ISA_EXT_DATA_ENTRY(smmpt, PRIV_VERSION_1_13_0, ext_smmpt), ISA_EXT_DATA_ENTRY(smnpm, PRIV_VERSION_1_13_0, ext_smnpm), ISA_EXT_DATA_ENTRY(smrnmi, PRIV_VERSION_1_12_0, ext_smrnmi), + ISA_EXT_DATA_ENTRY(smsdid, PRIV_VERSION_1_13_0, ext_smsdid), ISA_EXT_DATA_ENTRY(smstateen, PRIV_VERSION_1_12_0, ext_smstateen), ISA_EXT_DATA_ENTRY(ssaia, PRIV_VERSION_1_12_0, ext_ssaia), ISA_EXT_DATA_ENTRY(ssccfg, PRIV_VERSION_1_13_0, ext_ssccfg), @@ -1371,6 +1373,8 @@ const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {/* These are experimental so mark with 'x-' */const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = { + MULTI_EXT_CFG_BOOL("x-smmpt", ext_smmpt, false), + MULTI_EXT_CFG_BOOL("x-smsdid", ext_smsdid, false), MULTI_EXT_CFG_BOOL("x-svukte", ext_svukte, false),{ },
