On 10/24/2025 2:56 PM, Zhao Liu wrote:
> CR4.CET bit (bit 23) is as master enable for CET.
> Check and adjust CR4.CET bit based on CET CPUIDs.
>
> Tested-by: Farrah Chen <[email protected]>
> Signed-off-by: Zhao Liu <[email protected]>
> ---
> target/i386/cpu.h | 7 ++++++-
> target/i386/helper.c | 12 ++++++++++++
> 2 files changed, 18 insertions(+), 1 deletion(-)
>
> diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> index 7584cddb5917..86fbfd5e4023 100644
> --- a/target/i386/cpu.h
> +++ b/target/i386/cpu.h
> @@ -257,6 +257,7 @@ typedef enum X86Seg {
> #define CR4_SMEP_MASK (1U << 20)
> #define CR4_SMAP_MASK (1U << 21)
> #define CR4_PKE_MASK (1U << 22)
> +#define CR4_CET_MASK (1U << 23)
> #define CR4_PKS_MASK (1U << 24)
> #define CR4_LAM_SUP_MASK (1U << 28)
>
> @@ -274,7 +275,7 @@ typedef enum X86Seg {
> | CR4_LA57_MASK \
> | CR4_FSGSBASE_MASK | CR4_PCIDE_MASK | CR4_OSXSAVE_MASK \
> | CR4_SMEP_MASK | CR4_SMAP_MASK | CR4_PKE_MASK |
> CR4_PKS_MASK \
> - | CR4_LAM_SUP_MASK | CR4_FRED_MASK))
> + | CR4_LAM_SUP_MASK | CR4_FRED_MASK | CR4_CET_MASK))
Maybe put CR4_CET_MASK between PKE and PKS to keep it in order.
