On 23/10/25 06:35, [email protected] wrote:
From: Djordje Todorovic <[email protected]>
Add RISC-V implementation of the Coherent Manager Global Control
Register (CMGCR) device. It is based on the existing MIPS CMGCR
implementation but adapted for RISC-V systems.
The CMGCR device provides global system control for multi-core
configurations in RISC-V systems.
This is needed for the MIPS BOSTON AIA board.
Signed-off-by: Chao-ying Fu <[email protected]>
Signed-off-by: Djordje Todorovic <[email protected]>
Reviewed-by: Daniel Henrique Barboza <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Alistair Francis <[email protected]>
---
include/hw/misc/riscv_cmgcr.h | 50 +++++++
hw/misc/riscv_cmgcr.c | 248 ++++++++++++++++++++++++++++++++++
hw/misc/Kconfig | 9 ++
hw/misc/meson.build | 2 +
4 files changed, 309 insertions(+)
create mode 100644 include/hw/misc/riscv_cmgcr.h
create mode 100644 hw/misc/riscv_cmgcr.c
diff --git a/include/hw/misc/riscv_cmgcr.h b/include/hw/misc/riscv_cmgcr.h
new file mode 100644
index 0000000000..c57d4ada1c
--- /dev/null
+++ b/include/hw/misc/riscv_cmgcr.h
@@ -0,0 +1,50 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
Apparently another variant, not included in commit 1f59381d6c0
("scripts/checkpatch: reject license boilerplate on new files")
checks.
+ *
+ * Copyright (C) 2015 Imagination Technologies
+ *
+ * Copyright (C) 2025 MIPS
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ */
