Hi Jason,
On 11/4/25 3:50 PM, Jason Gunthorpe wrote:
> On Tue, Nov 04, 2025 at 03:35:42PM +0100, Eric Auger wrote:
>>> + /*
>>> + * TODO: OAS is not something Linux kernel doc says meaningful for
>>> user.
>>> + * But looks like OAS needs to be compatible for accelerator support.
>>> Please
>>> + * check.
>> would remove that comment. Either it is requested or not.
>>> + */
>>> + if (FIELD_EX32(info->idr[5], IDR5, OAS) <
>>> + FIELD_EX32(s->idr[5], IDR5, OAS)) {
>>> + error_setg(errp, "Host SMMUv3 OAS(%d) bits not compatible",
>>> + smmuv3_oas_bits(FIELD_EX32(info->idr[5], IDR5, OAS)));
>> let's be more explicit then and say
>>
>> Host SMMUv3 OAS (%d bits) is less that OAS bits advertised by SMMU (%d)
> It isn't OAS that is being checked here, this is now IPA. OAS is for
> use by the hypervisor.
>
> When the guest looks at the vSMMU the "OAS" it sees is the IPS
> supported by the HW.
>
> Aside from the raw HW limit, it also shouldn't exceed the configured
> size of the S2 HWPT.
>
> So the above should refer to this detail because it is a bit subtle
> that OAS and IPS are often the same. See "3.4 Address sizes"
>
> * IAS reflects the maximum usable IPA of an implementation that is
> generated by stage 1 and input to stage 2:
>
> - This term is defined to illustrate the handling of intermediate
> addresses in this section and is not a configurable parameter.
>
> - The maximum usable IPA size of an SMMU is defined in terms of other SMMU
> implementation choices,
> as:
> IAS = MAX(SMMU_IDR0.TTF[0]==1 ? 40 : 0), SMMU_IDR0.TTF[1]==1 ? OAS : 0));
>
> - An IPA of 40 bits is required to support of AArch32 LPAE translations, and
> AArch64 limits the
> maximum IPA size to the maximum PA size. Otherwise, when AArch32 LPAE is not
> implemented, the
> IPA size equals OAS, the PA size, and might be smaller than 40 bits.
>
> - The purpose of definition of the IAS term is to abstract away from these
> implementation variables.
Thank you for the clarification and pointer. I fully agree.
maybe we can rephrase the error msg as:
"Host SMMUv3 OAS (%d bits) is less that physical SMMU maximum usable IPA (%d)"
which is more accurate despite in practice here we assimilate max IPA to OAS (
TTF[1]==1 case)
Eric
>
> Jason
>
