On Fri, 14 Nov 2025 at 16:06, Yodel Eldar <[email protected]> wrote: > > > On 11/11/2025 04:54, Alex Bennée wrote: > > The datasheet doesn't explicitly say that TXFR_LEN has to be word > > aligned but the fact there is a DMA_D_WIDTH flag to select between 32 > > bit and 128 bit strongly implies that is how it works. The downstream > > At the bottom of page 38, the datasheet [1] states "the DMA can deal > with byte aligned transfers and will minimise bus traffic by buffering > and packing misaligned accesses."
Yeah, I read that, but my interpretation of it is that it says it's OK to provide non-4-aligned source and destination addresses. It doesn't say anything either way about whether the transfer size can be a non-multiple of 4. thanks -- PMM
