The x86_ext_save_areas[] is expected to be well initialized by accelerators and its xstate detail information cannot be changed by user. So use x86_ext_save_areas[] to encode CPUID.0XD subleaves directly without other hardcoding & masking.
And for arch LBR case, since its entry in x86_ext_save_areas[] has been initialized based KVM support in kvm_cpu_xsave_init(), so use x86_ext_save_areas[] for encoding. Tested-by: Farrah Chen <[email protected]> Signed-off-by: Zhao Liu <[email protected]> --- Changes Since v3: - New commit. --- target/i386/cpu.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 70a282668f72..f3bf7f892214 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8188,20 +8188,17 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, } } else if (count == 0xf && cpu->enable_pmu && (env->features[FEAT_7_0_EDX] & CPUID_7_0_EDX_ARCH_LBR)) { - x86_cpu_get_supported_cpuid(0xD, count, eax, ebx, ecx, edx); + const ExtSaveArea *esa = &x86_ext_save_areas[count]; + + *eax = esa->size; + *ebx = esa->offset; + *ecx = esa->ecx; } else if (count < ARRAY_SIZE(x86_ext_save_areas)) { const ExtSaveArea *esa = &x86_ext_save_areas[count]; - if (x86_cpu_xsave_xcr0_components(cpu) & (1ULL << count)) { - *eax = esa->size; - *ebx = esa->offset; - *ecx = esa->ecx & - (ESA_FEATURE_ALIGN64_MASK | ESA_FEATURE_XFD_MASK); - } else if (x86_cpu_xsave_xss_components(cpu) & (1ULL << count)) { - *eax = esa->size; - *ebx = 0; - *ecx = 1; - } + *eax = esa->size; + *ebx = esa->offset; + *ecx = esa->ecx; } break; } -- 2.34.1
