On 12/10/25 08:50, Jim MacArthur wrote:
This just allows read/write of three feature bits. ASID is still
ignored. Any writes to TTBR0_EL0 and TTBR1_EL0, including changing
the ASID, will still cause a complete flush of the TLB.
Signed-off-by: Jim MacArthur<[email protected]>
---
target/arm/cpu-features.h | 7 +++++++
target/arm/helper.c | 28 ++++++++++++++++++++++------
target/arm/internals.h | 5 +++++
3 files changed, 34 insertions(+), 6 deletions(-)
Reviewed-by: Richard Henderson <[email protected]>
r~
