On Tue, Dec 23, 2025 at 5:42 PM Kane Chen <[email protected]> wrote: > > From: Kane-Chen-AS <[email protected]> > > Map the SRAM device to AST1700 model > > Signed-off-by: Kane-Chen-AS <[email protected]> > Reviewed-by: Cédric Le Goater <[email protected]>
Reviewed-by: Nabih Estefan <[email protected]> Tested-by: Nabih Estefan <[email protected]> > --- > include/hw/arm/aspeed_ast1700.h | 2 ++ > hw/arm/aspeed_ast1700.c | 18 ++++++++++++++++++ > hw/arm/aspeed_ast27x0.c | 1 + > 3 files changed, 21 insertions(+) > > diff --git a/include/hw/arm/aspeed_ast1700.h b/include/hw/arm/aspeed_ast1700.h > index a0d6b3ae44..23588f7a81 100644 > --- a/include/hw/arm/aspeed_ast1700.h > +++ b/include/hw/arm/aspeed_ast1700.h > @@ -20,9 +20,11 @@ struct AspeedAST1700SoCState { > SysBusDevice parent_obj; > > MemoryRegion iomem; > + uint8_t board_idx; > > AspeedLTPIState ltpi; > SerialMM uart; > + MemoryRegion sram; > }; > > #endif /* ASPEED_AST1700_H */ > diff --git a/hw/arm/aspeed_ast1700.c b/hw/arm/aspeed_ast1700.c > index f444582795..cb07d94054 100644 > --- a/hw/arm/aspeed_ast1700.c > +++ b/hw/arm/aspeed_ast1700.c > @@ -14,13 +14,16 @@ > #include "hw/arm/aspeed_ast1700.h" > > #define AST2700_SOC_LTPI_SIZE 0x01000000 > +#define AST1700_SOC_SRAM_SIZE 0x00040000 > > enum { > + ASPEED_AST1700_DEV_SRAM, > ASPEED_AST1700_DEV_UART12, > ASPEED_AST1700_DEV_LTPI_CTRL, > }; > > static const hwaddr aspeed_ast1700_io_memmap[] = { > + [ASPEED_AST1700_DEV_SRAM] = 0x00BC0000, > [ASPEED_AST1700_DEV_UART12] = 0x00C33B00, > [ASPEED_AST1700_DEV_LTPI_CTRL] = 0x00C34000, > }; > @@ -29,12 +32,21 @@ static void aspeed_ast1700_realize(DeviceState *dev, > Error **errp) > { > AspeedAST1700SoCState *s = ASPEED_AST1700(dev); > SysBusDevice *sbd = SYS_BUS_DEVICE(dev); > + char dev_name[32]; > > /* Occupy memory space for all controllers in AST1700 */ > memory_region_init(&s->iomem, OBJECT(s), TYPE_ASPEED_AST1700, > AST2700_SOC_LTPI_SIZE); > sysbus_init_mmio(sbd, &s->iomem); > > + /* SRAM */ > + snprintf(dev_name, sizeof(dev_name), "aspeed.ioexp-sram.%d", > s->board_idx); > + memory_region_init_ram(&s->sram, OBJECT(s), dev_name, > + AST1700_SOC_SRAM_SIZE, errp); > + memory_region_add_subregion(&s->iomem, > + > aspeed_ast1700_io_memmap[ASPEED_AST1700_DEV_SRAM], > + &s->sram); > + > /* UART */ > qdev_prop_set_uint8(DEVICE(&s->uart), "regshift", 2); > qdev_prop_set_uint32(DEVICE(&s->uart), "baudbase", 38400); > @@ -69,11 +81,17 @@ static void aspeed_ast1700_instance_init(Object *obj) > > return; > } > + > +static const Property aspeed_ast1700_props[] = { > + DEFINE_PROP_UINT8("board-idx", AspeedAST1700SoCState, board_idx, 0), > +}; > + > static void aspeed_ast1700_class_init(ObjectClass *klass, const void *data) > { > DeviceClass *dc = DEVICE_CLASS(klass); > > dc->realize = aspeed_ast1700_realize; > + device_class_set_props(dc, aspeed_ast1700_props); > } > > static const TypeInfo aspeed_ast1700_info = { > diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c > index 678d4eb6d9..f2418e0e45 100644 > --- a/hw/arm/aspeed_ast27x0.c > +++ b/hw/arm/aspeed_ast27x0.c > @@ -1096,6 +1096,7 @@ static void aspeed_soc_ast2700_realize(DeviceState > *dev, Error **errp) > > /* IO Expander */ > for (i = 0; i < sc->ioexp_num; i++) { > + qdev_prop_set_uint8(DEVICE(&s->ioexp[i]), "board-idx", i); > if (!sysbus_realize(SYS_BUS_DEVICE(&s->ioexp[i]), errp)) { > return; > } > -- > 2.43.0 >
