On 07/01/26, Philippe Mathieu-Daudé wrote:
> Check endianness at runtime to remove the target-specific
> TARGET_BIG_ENDIAN definition.
> 
> Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
> ---
>  target/xtensa/translate.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
> index bb8d2ed86cf..36f069d70ca 100644
> --- a/target/xtensa/translate.c
> +++ b/target/xtensa/translate.c
> @@ -34,6 +34,7 @@
>  #include "tcg/tcg-op.h"
>  #include "qemu/log.h"
>  #include "qemu/qemu-print.h"
> +#include "qemu/target-info.h"
>  #include "exec/translator.h"
>  #include "exec/translation-block.h"
>  #include "exec/target_page.h"
> @@ -1381,7 +1382,7 @@ static void translate_bb(DisasContext *dc, const 
> OpcodeArg arg[],
>      TCGv_i32 tmp = tcg_temp_new_i32();
>  
>      tcg_gen_andi_i32(tmp, arg[1].in, 0x1f);
> -    if (TARGET_BIG_ENDIAN) {
> +    if (target_big_endian()) {
>          tcg_gen_shr_i32(tmp, tcg_constant_i32(0x80000000u), tmp);
>      } else {
>          tcg_gen_shl_i32(tmp, tcg_constant_i32(0x00000001u), tmp);
> @@ -1394,7 +1395,7 @@ static void translate_bbi(DisasContext *dc, const 
> OpcodeArg arg[],
>                            const uint32_t par[])
>  {
>      TCGv_i32 tmp = tcg_temp_new_i32();
> -    if (TARGET_BIG_ENDIAN) {
> +    if (target_big_endian()) {
>          tcg_gen_andi_i32(tmp, arg[0].in, 0x80000000u >> arg[1].imm);
>      } else {
>          tcg_gen_andi_i32(tmp, arg[0].in, 0x00000001u << arg[1].imm);
> -- 
> 2.52.0
> 

What about the two remaining uses of TARGET_BIG_ENDIAN? The one in cpu.c
is straight forward

  static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
  {
      XtensaCPU *cpu = XTENSA_CPU(cs);
  
      info->private_data = cpu->env.config->isa;
      info->print_insn = print_insn_xtensa;
      info->endian = TARGET_BIG_ENDIAN ? BFD_ENDIAN_BIG
                                       : BFD_ENDIAN_LITTLE;
  }

I guess for the one in overlay_tool.h we can register all cores
unconditionally and filter for endianness mismatch with target_big_endian()
later?

  #if TARGET_BIG_ENDIAN == (XCHAL_HAVE_BE != 0)
  #define REGISTER_CORE(core) \
      static void __attribute__((constructor)) register_core(void) \
      { \
          static XtensaConfigList node = { \
              .config = &core, \
          }; \
          xtensa_register_core(&node); \
      }
  #else
  #define REGISTER_CORE(core)
  #endif

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