On 1/14/26 12:14, Joel Stanley wrote:
On Wed, 14 Jan 2026 at 19:36, Cédric Le Goater <[email protected]> wrote:
Hello Joel,
On 1/14/26 05:34, Joel Stanley wrote:
v2 separates out prep patches so the machine can be reviewed
independently. It depends on the following two series:
AIA:
https://lore.kernel.org/qemu-devel/[email protected]
Boot:
https://lore.kernel.org/qemu-devel/[email protected]
Original cover letter:
Introducing Tenstorrent Atlantis!
The Tenstorrent Atlantis platform is a collaboration between Tenstorrent
What kind of board is the "Tenstorrent Atlantis platform" ? Is it an evb ?
An upcoming dev board with the SoC on it.
and CoreLab Technology. It is based on the Atlantis SoC, which includes
Why isn't the SoC modeled independently ?
What I've modelled is the soc, with the exception of the test i2c
sensors. Everything listed (aside from the i2c sensors) is inside the
SoC.
Lets say we add atlantis-evb that has atlantis-soc on it, with memory,
i2c devices, etc. What does that look like?
Looks good to me.
The aspeed machines are a bit complex to follow these days!
Aspeed machines have been around for a decade. Ten years already !
Tenstorrent machines should be similar in 2036. Hopefully sooner.
Thanks,
C.
