Their gen_* functions were incorrectly named gen_VDDPS and gen_VDDPD.
Signed-off-by: Paolo Bonzini <[email protected]>
---
target/i386/tcg/decode-new.c.inc | 4 ++--
target/i386/tcg/emit.c.inc | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/i386/tcg/decode-new.c.inc b/target/i386/tcg/decode-new.c.inc
index e44b92710cf..b00ea3e86e8 100644
--- a/target/i386/tcg/decode-new.c.inc
+++ b/target/i386/tcg/decode-new.c.inc
@@ -977,8 +977,8 @@ static const X86OpEntry opcodes_0F3A[256] = {
[0x21] = X86_OP_GROUP0(VINSERTPS),
[0x22] = X86_OP_ENTRY4(PINSR, V,dq, H,dq, E,y, vex5 cpuid(SSE41)
p_66),
- [0x40] = X86_OP_ENTRY4(VDDPS, V,x, H,x, W,x, vex2 cpuid(SSE41)
p_66),
- [0x41] = X86_OP_ENTRY4(VDDPD, V,dq, H,dq, W,dq, vex2 cpuid(SSE41)
p_66),
+ [0x40] = X86_OP_ENTRY4(VDPPS, V,x, H,x, W,x, vex2 cpuid(SSE41)
p_66),
+ [0x41] = X86_OP_ENTRY4(VDPPD, V,dq, H,dq, W,dq, vex2 cpuid(SSE41)
p_66),
[0x42] = X86_OP_ENTRY4(VMPSADBW, V,x, H,x, W,x, vex2 cpuid(SSE41)
avx2_256 p_66),
[0x44] = X86_OP_ENTRY4(PCLMULQDQ, V,dq, H,dq, W,dq, vex4 cpuid(PCLMULQDQ)
p_66),
[0x46] = X86_OP_ENTRY4(VPERM2x128, V,qq, H,qq, W,qq, vex6 chk(W0)
cpuid(AVX2) p_66),
diff --git a/target/i386/tcg/emit.c.inc b/target/i386/tcg/emit.c.inc
index bc3a07f972c..f5f12e48b77 100644
--- a/target/i386/tcg/emit.c.inc
+++ b/target/i386/tcg/emit.c.inc
@@ -788,9 +788,9 @@ static void gen_##uname(DisasContext *s, X86DecodedInsn
*decode)
BINARY_IMM_SSE(VBLENDPD, blendpd)
BINARY_IMM_SSE(VBLENDPS, blendps)
BINARY_IMM_SSE(VPBLENDW, pblendw)
-BINARY_IMM_SSE(VDDPS, dpps)
+BINARY_IMM_SSE(VDPPS, dpps)
#define gen_helper_dppd_ymm NULL
-BINARY_IMM_SSE(VDDPD, dppd)
+BINARY_IMM_SSE(VDPPD, dppd)
BINARY_IMM_SSE(VMPSADBW, mpsadbw)
BINARY_IMM_SSE(PCLMULQDQ, pclmulqdq)
--
2.52.0
