On 2026/1/21 02:31, Philippe Mathieu-Daudé wrote:
On 19/1/26 17:11, Tao Tang wrote:
Add a minimal PCI test device designed to exercise IOMMU translation
(such as ARM SMMUv3) without requiring guest firmware or OS. The device
provides MMIO registers to configure and trigger DMA operations with
controllable attributes (security state, address space), enabling
deterministic IOMMU testing.
Key features:
- Bare-metal IOMMU testing via simple MMIO interface
- Configurable DMA attributes for security states and address spaces
- Write-then-read verification pattern with automatic result checking
The device performs a deterministic DMA test pattern: write a known
value (0x12345678) to a configured GVA, read it back, and verify data
integrity. Results are reported through a dedicated result register,
eliminating the need for complex interrupt handling or driver
infrastructure in tests.
This is purely a test device and not intended for production use or
machine realism. It complements existing test infrastructure like
pci-testdev but focuses specifically on IOMMU translation path
validation.
Signed-off-by: Tao Tang <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Reviewed-by: Fabiano Rosas <[email protected]>
---
MAINTAINERS | 7 +
docs/specs/index.rst | 1 +
docs/specs/iommu-testdev.rst | 138 ++++++++++++++
hw/misc/Kconfig | 5 +
hw/misc/iommu-testdev.c | 318 ++++++++++++++++++++++++++++++++
hw/misc/meson.build | 1 +
hw/misc/trace-events | 10 +
include/hw/misc/iommu-testdev.h | 87 +++++++++
8 files changed, 567 insertions(+)
create mode 100644 docs/specs/iommu-testdev.rst
create mode 100644 hw/misc/iommu-testdev.c
create mode 100644 include/hw/misc/iommu-testdev.h
diff --git a/docs/specs/iommu-testdev.rst b/docs/specs/iommu-testdev.rst
new file mode 100644
index 0000000000..e15f9a55a7
--- /dev/null
+++ b/docs/specs/iommu-testdev.rst
@@ -0,0 +1,138 @@
Squashing 'SPDX-License-Identifier: GPL-2.0-or-later' like .c & .h.
Hi Philippe,
Thanks for catching this. I’ll pay attention to this in the future.
Regards,
Tao
+iommu-testdev — IOMMU test device for bare-metal testing
+=========================================================
+
+Overview
+--------
+``iommu-testdev`` is a minimal, test-only PCI device designed to
exercise
+IOMMU translation (such as ARM SMMUv3) without requiring firmware or
a guest
+OS. Tests can populate IOMMU translation tables with known values
and trigger
+DMA operations that flow through the IOMMU translation path. It is
**not** a
+faithful PCIe endpoint and must be considered a QEMU-internal test
vehicle.
...
diff --git a/hw/misc/iommu-testdev.c b/hw/misc/iommu-testdev.c
new file mode 100644
index 0000000000..15eb6de78a
--- /dev/null
+++ b/hw/misc/iommu-testdev.c
@@ -0,0 +1,318 @@
+/*
+ * A test device for IOMMU
+ *
+ * Copyright (c) 2026 Phytium Technology
+ *
+ * Author:
+ * Tao Tang <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
diff --git a/include/hw/misc/iommu-testdev.h
b/include/hw/misc/iommu-testdev.h
new file mode 100644
index 0000000000..338365947c
--- /dev/null
+++ b/include/hw/misc/iommu-testdev.h
@@ -0,0 +1,87 @@
+/*
+ * A test device for IOMMU
+ *
+ * Copyright (c) 2026 Phytium Technology
+ *
+ * Author:
+ * Tao Tang <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
