> On 11. Feb 2026, at 16:54, Magnus Kulke <[email protected]>
> wrote:
>
> When using the extended request format we can instruct the hypervisor to
> provision enough space for requested XSAVE features. This is required
> for supporting QEMU models provided via the -cpu flag properly.
>
> Signed-off-by: Magnus Kulke <[email protected]>
> —
[…]
Hi,
On the 1st party Microsoft headers side (as in WHP), the two banks are defined
separately.
For example:
ACountMCountSupport instead of a_count_m_count_support
Any reason in particular to diverge and would you prefer to use the definition
here in WHP too?
Thank you,
> + /* N.B. Begin bank 1 processor features. */
> + uint64_t a_count_m_count_support:1;
> + uint64_t tsc_invariant_support:1;
> + uint64_t cl_zero_support:1;
> + uint64_t rdpru_support:1;
> + uint64_t la57_support:1;
> + uint64_t mbec_support:1;
> + uint64_t nested_virt_support:1;
> + uint64_t psfd_support:1;
> + uint64_t cet_ss_support:1;
> + uint64_t cet_ibt_support:1;
> + uint64_t vmx_exception_inject_support:1;
> + uint64_t enqcmd_support:1;
> + uint64_t umwait_tpause_support:1;
> + uint64_t movdiri_support:1;
> + uint64_t movdir64b_support:1;
> + uint64_t cldemote_support:1;
> + uint64_t serialize_support:1;
> + uint64_t tsc_deadline_tmr_support:1;
> + uint64_t tsc_adjust_support:1;
> + uint64_t fzl_rep_movsb:1;
> + uint64_t fs_rep_stosb:1;
> + uint64_t fs_rep_cmpsb:1;
> + uint64_t tsx_ld_trk_support:1;
> + uint64_t vmx_ins_outs_exit_info_support:1;
> + uint64_t hlat_support:1;
> + uint64_t sbdr_ssdp_no_support:1;
> + uint64_t fbsdp_no_support:1;
> + uint64_t psdp_no_support:1;
> + uint64_t fb_clear_support:1;
> + uint64_t btc_no_support:1;
> + uint64_t ibpb_rsb_flush_support:1;
> + uint64_t stibp_always_on_support:1;
> + uint64_t perf_global_ctrl_support:1;
> + uint64_t npt_execute_only_support:1;
> + uint64_t npt_ad_flags_support:1;
> + uint64_t npt1_gb_page_support:1;
> + uint64_t amd_processor_topology_node_id_support:1;
> + uint64_t local_machine_check_support:1;
> + uint64_t extended_topology_leaf_fp256_amd_support:1;
> + uint64_t gds_no_support:1;
> + uint64_t cmpccxadd_support:1;
> + uint64_t tsc_aux_virtualization_support:1;
> + uint64_t rmp_query_support:1;
> + uint64_t bhi_no_support:1;
> + uint64_t bhi_dis_support:1;
> + uint64_t prefetch_i_support:1;
> + uint64_t sha512_support:1;
> + uint64_t mitigation_ctrl_support:1;
> + uint64_t rfds_no_support:1;
> + uint64_t rfds_clear_support:1;
> + uint64_t sm3_support:1;
> + uint64_t sm4_support:1;
> + uint64_t secure_avic_support:1;
> + uint64_t guest_intercept_ctrl_support:1;
> + uint64_t sbpb_supported:1;
> + uint64_t ibpb_br_type_supported:1;
> + uint64_t srso_no_supported:1;
> + uint64_t srso_user_kernel_no_supported:1;
> + uint64_t vrew_clear_supported:1;
> + uint64_t tsa_l1_no_supported:1;
> + uint64_t tsa_sq_no_supported:1;
> + uint64_t lass_support:1;
> + uint64_t idle_hlt_intercept_support:1;
> + uint64_t msr_list_support:1;
> + };
> +};
> +
> enum hv_translate_gva_result_code {
> HV_TRANSLATE_GVA_SUCCESS = 0,
>
> --
> 2.34.1
>
>
