In order to avoid symbol name clash when building a single binary, rename TCG helpers prefixing with the target name.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- target/arm/tcg/helper-a64-defs.h | 2 +- target/microblaze/helper.h | 2 +- target/arm/tcg/helper-a64.c | 4 ++-- target/arm/tcg/translate-a64.c | 4 ++-- target/microblaze/helper.c | 2 +- target/microblaze/translate.c | 2 +- 6 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/arm/tcg/helper-a64-defs.h b/target/arm/tcg/helper-a64-defs.h index b6008b5a3ac..b329d7eb6a6 100644 --- a/target/arm/tcg/helper-a64-defs.h +++ b/target/arm/tcg/helper-a64-defs.h @@ -113,7 +113,7 @@ DEF_HELPER_FLAGS_2(ldgm, TCG_CALL_NO_WG, i64, env, i64) DEF_HELPER_FLAGS_3(stgm, TCG_CALL_NO_WG, void, env, i64, i64) DEF_HELPER_FLAGS_3(stzgm_tags, TCG_CALL_NO_WG, void, env, i64, i64) -DEF_HELPER_FLAGS_4(unaligned_access, TCG_CALL_NO_WG, +DEF_HELPER_FLAGS_4(arm_unaligned_access, TCG_CALL_NO_WG, noreturn, env, i64, i32, i32) DEF_HELPER_3(setp, void, env, i32, i32) diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index 01eba592b26..1429c1727ef 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -27,7 +27,7 @@ DEF_HELPER_FLAGS_3(put, TCG_CALL_NO_RWG, void, i32, i32, i32) #ifndef CONFIG_USER_ONLY DEF_HELPER_FLAGS_3(mmu_read, TCG_CALL_NO_RWG, i32, env, i32, i32) DEF_HELPER_FLAGS_4(mmu_write, TCG_CALL_NO_RWG, void, env, i32, i32, i32) -DEF_HELPER_FLAGS_2(unaligned_access, TCG_CALL_NO_WG, noreturn, env, i64) +DEF_HELPER_FLAGS_2(microblaze_unaligned_access, TCG_CALL_NO_WG, noreturn, env, i64) DEF_HELPER_FLAGS_2(lbuea, TCG_CALL_NO_WG, i32, env, i64) DEF_HELPER_FLAGS_2(lhuea_be, TCG_CALL_NO_WG, i32, env, i64) DEF_HELPER_FLAGS_2(lhuea_le, TCG_CALL_NO_WG, i32, env, i64) diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index 2dec587d386..f824c662a3a 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -835,8 +835,8 @@ void HELPER(dc_zva)(CPUARMState *env, uint64_t vaddr_in) clear_helper_retaddr(); } -void HELPER(unaligned_access)(CPUARMState *env, uint64_t addr, - uint32_t access_type, uint32_t mmu_idx) +void HELPER(arm_unaligned_access)(CPUARMState *env, uint64_t addr, + uint32_t access_type, uint32_t mmu_idx) { arm_cpu_do_unaligned_access(env_cpu(env), addr, access_type, mmu_idx, GETPC()); diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 5d261a5e32b..c17ddf9e70e 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -381,8 +381,8 @@ static void check_lse2_align(DisasContext *s, int rn, int imm, type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD, mmu_idx = get_mem_index(s); - gen_helper_unaligned_access(tcg_env, addr, tcg_constant_i32(type), - tcg_constant_i32(mmu_idx)); + gen_helper_arm_unaligned_access(tcg_env, addr, tcg_constant_i32(type), + tcg_constant_i32(mmu_idx)); gen_set_label(over_label); diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index a1857b72172..24a9b50183d 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -69,7 +69,7 @@ void mb_cpu_do_unaligned_access(CPUState *cs, vaddr addr, #ifndef CONFIG_USER_ONLY -void HELPER(unaligned_access)(CPUMBState *env, uint64_t addr) +void HELPER(microblaze_unaligned_access)(CPUMBState *env, uint64_t addr) { mb_unaligned_access_internal(env_cpu(env), addr, GETPC()); } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 2af67beecec..8b896abf0e5 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -689,7 +689,7 @@ static void gen_alignment_check_ea(DisasContext *dc, TCGv_i64 ea, int rb, record_unaligned_ess(dc, rd, size, store); tcg_gen_brcondi_i64(TCG_COND_TSTEQ, ea, (1 << size) - 1, over); - gen_helper_unaligned_access(tcg_env, ea); + gen_helper_microblaze_unaligned_access(tcg_env, ea); gen_set_label(over); } } -- 2.52.0
