On 2/21/26 2:18 AM, Tao Tang wrote:
Implement read/write handlers for the SMMU_S_INIT secure-only register.
Writing INV_ALL provides a mechanism for software to perform a global
invalidation of ALL caches within the SMMU, including IOTLBs and
configuration caches across all security states.
The MMIO dispatcher decodes the target register bank from the high bits
of the offset and then switches on the 4KB page-local offset
(offset & 0xfff), since registers that share the same function across
banks use the same relative layout. S_INIT is a secure-only register and
its A_S_INIT constant is currently defined as an absolute secure-window
offset (0x803c), so it has no NS twin to reuse as a shared low-12-bit
macro. As a one-off special case, the handler matches it via
(A_S_INIT & 0xfff) to fit the relative-offset decode.
This feature is critical for secure hypervisors like Hafnium, which use
it as a final step in their SMMU initialization sequence to ensure a
clean cache state before enabling translations.
Signed-off-by: Tao Tang <[email protected]>
---
hw/arm/smmuv3.c | 37 +++++++++++++++++++++++++++++++++++++
hw/arm/trace-events | 1 +
2 files changed, 38 insertions(+)
Reviewed-by: Pierrick Bouvier <[email protected]>
