[PATCH v3 19/32] target/hexagon: Add sysemu_ops, cpu_get_phys_page_debug()

[Brian Cain]

From: Brian Cain <bc...@quicinc.com>

Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com>
Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>
---
 target/hexagon/cpu.c | 32 ++++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index c5ec478ef40..6849dc7966b 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -20,6 +20,7 @@
 #include "qemu/qemu-print.h"
 #include "cpu.h"
 #include "internal.h"
+#include "exec/cputlb.h"
 #include "exec/translation-block.h"
 #include "qapi/error.h"
 #include "hw/core/qdev-properties.h"
@@ -37,6 +38,7 @@
 #include "accel/tcg/cpu-ldst.h"
 #include "qemu/main-loop.h"
 #include "hex_interrupts.h"
+#include "hexswi.h"
 #include "exec/cpu-interrupt.h"
 #include "exec/target_page.h"
 #include "hw/hexagon/hexagon_globalreg.h"
@@ -506,6 +508,24 @@ static void find_qemu_subpage(vaddr *addr, hwaddr *phys, 
uint64_t page_size)
     *phys += offset;
 }
 
+static hwaddr hexagon_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
+{
+    CPUHexagonState *env = cpu_env(cs);
+    hwaddr phys_addr;
+    int prot;
+    uint64_t page_size = 0;
+    int32_t excp = 0;
+    int mmu_idx = MMU_KERNEL_IDX;
+
+    if (get_physical_address(env, &phys_addr, &prot, &page_size, &excp,
+                             addr, 0, mmu_idx)) {
+        find_qemu_subpage(&addr, &phys_addr, page_size);
+        return phys_addr;
+    }
+
+    return -1;
+}
+
 
 #define INVALID_BADVA 0xbadabada
 
@@ -613,6 +633,13 @@ static bool hexagon_tlb_fill(CPUState *cs, vaddr address, 
int size,
     do_raise_exception(env, cs->exception_index, env->gpr[HEX_REG_PC], 
retaddr);
 }
 
+#include "hw/core/sysemu-cpu-ops.h"
+
+static const struct SysemuCPUOps hexagon_sysemu_ops = {
+    .has_work = hexagon_cpu_has_work,
+    .get_phys_page_debug = hexagon_cpu_get_phys_page_debug,
+};
+
 static bool hexagon_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
     CPUHexagonState *env = cpu_env(cs);
@@ -655,6 +682,8 @@ static const TCGCPUOps hexagon_tcg_ops = {
     .pointer_wrap = hexagon_pointer_wrap,
     .cpu_exec_reset = cpu_reset,
     .tlb_fill = hexagon_tlb_fill,
+    .cpu_exec_halt = hexagon_cpu_has_work,
+    .do_interrupt = hexagon_cpu_do_interrupt,
 #endif /* !CONFIG_USER_ONLY */
 };
 
@@ -682,9 +711,12 @@ static void hexagon_cpu_class_init(ObjectClass *c, const 
void *data)
     cc->gdb_core_xml_file = "hexagon-core.xml";
     cc->disas_set_info = hexagon_cpu_disas_set_info;
 #ifndef CONFIG_USER_ONLY
+    cc->sysemu_ops = &hexagon_sysemu_ops;
     dc->vmsd = &vmstate_hexagon_cpu;
 #endif
+#ifdef CONFIG_TCG
     cc->tcg_ops = &hexagon_tcg_ops;
+#endif
 }
 
 #define DEFINE_CPU(type_name, initfn)      \
-- 
2.34.1