This is Part 2 of the hexagon system emulation (sysemu) patch series,
building on the infrastructure from Part 1 to implement the runtime
helpers and CPU operations needed for full-system emulation.

This part adds:
  - Helper implementations for system instructions: swi, cswi,
    iassign, start/stop, wait/resume, setprio, resched
  - SSR (System Status Register) modification and exe mode support
  - Cycle counter implementation
  - TLB operations: tlb_fill, tlb_entry_get_perm
  - Interrupt handling: exec_interrupt, set_irq, software interrupt
  - Stack overflow exception (fFRAMECHECK / FRAMELIMIT check)
  - CPU execution support: cpu_exec_reset, pointer_wrap, sysemu_ops
  - Translation support: pkt_ends_tb, implicit sysreg writes, next_PC
  - System/guest register name definitions
  - TCG overrides for transfer and load_phys instructions
  - Guest register and pcycle reading functionality

Changes since v2:
  - Dropped "Implement ciad helper" (l2vic deferred to a future series)
  - Dropped "Implement arch_get_system_reg()" and "Implement
    arch_{s,g}et_{thread,system}_reg()" -- the arch_*_system_reg
    abstraction layer is no longer introduced (callers use
    globalreg_read/write directly)
  - Dropped "Implement modify_syscfg()", "Implement
    hex_tlb_lookup_by_asid()", "Implement hexagon_find_last_irq()",
    "Initialize sys/guest reg TCGvs"
  - Dropped "Add exec-start-addr prop" (folded into Part 3 commit)
  - Renamed "Define gen_precise_exception()" to "Add PC to
    raise_exception, use fTRAP() helper"
  - Added "Implement stack overflow exception" commit
  - Moved TLB lock macros (fSET_TLB_LOCK, fCLEAR_TLB_LOCK) to Part 1;
    "Add TLB, k0 {un,}lock" now only adds K0 lock macros
  - Removed CONFIG_USER_ONLY guards from cpu_helper.c (file in
    hexagon_softmmu_ss)

Previous versions:
  v2: 
https://lore.kernel.org/qemu-devel/[email protected]/
  v1: 
https://lore.kernel.org/qemu-devel/[email protected]/

Brian Cain (30):
  target/hexagon: Implement {c,}swi helpers
  target/hexagon: Implement iassign{r,w} helpers
  target/hexagon: Implement start/stop helpers, soft reset
  target/hexagon: Implement modify SSR
  target/hexagon: Implement {g,s}etimask helpers
  target/hexagon: Implement wait helper
  target/hexagon: Implement get_exe_mode()
  target/hexagon: Add representation to count cycles
  target/hexagon: Add implementation of cycle counters
  target/hexagon: Implement hex_tlb_entry_get_perm()
  target/hexagon: Implement software interrupt
  target/hexagon: Implement stack overflow exception
  target/hexagon: Implement exec_interrupt, set_irq
  target/hexagon: Implement hexagon_tlb_fill()
  target/hexagon: Implement siad inst
  target/hexagon: Implement hexagon_resume_threads()
  target/hexagon: Implement setprio, resched
  target/hexagon: Add sysemu_ops, cpu_get_phys_page_debug()
  target/hexagon: extend hexagon_cpu_mmu_index() for sysemu
  target/hexagon: Decode trap1, rte as COF
  target/hexagon: Implement modify_ssr, resched, pending_interrupt
  target/hexagon: Add pkt_ends_tb to translation
  target/hexagon: Add next_PC, {s,g}reg writes
  target/hexagon: Add implicit sysreg writes
  target/hexagon: Define system, guest reg names
  target/hexagon: Add TLB, k0 {un,}lock
  target/hexagon: Add PC to raise_exception, use fTRAP() helper
  target/hexagon: Add TCG overrides for transfer insts
  target/hexagon: Add support for loadw_phys
  target/hexagon: Add pcycle setting functionality

Matheus Tavares Bernardino (2):
  target/hexagon: add simple cpu_exec_reset and pointer_wrap
  target/hexagon: Add guest reg reading functionality

 target/hexagon/cpu.h                  |  20 +-
 target/hexagon/cpu_helper.h           |   5 +
 target/hexagon/gen_tcg.h              |   7 -
 target/hexagon/gen_tcg_sys.h          |  25 ++
 target/hexagon/helper.h               |   6 +-
 target/hexagon/hexswi.h               |  17 +
 target/hexagon/internal.h             |   4 +
 target/hexagon/macros.h               |   3 -
 target/hexagon/sys_macros.h           |   7 +
 target/hexagon/translate.h            |   5 +
 target/hexagon/reg_fields_def.h.inc   |  11 +
 linux-user/hexagon/cpu_loop.c         |   7 +
 target/hexagon/cpu.c                  | 368 ++++++++++++++++++++-
 target/hexagon/cpu_helper.c           | 282 +++++++++++++++-
 target/hexagon/decode.c               |  14 +
 target/hexagon/genptr.c               |  18 +-
 target/hexagon/hexswi.c               | 260 +++++++++++++++
 target/hexagon/op_helper.c            | 443 ++++++++++++++++++++++++--
 target/hexagon/translate.c            | 248 +++++++++++++-
 target/hexagon/hex_common.py          |   3 +
 target/hexagon/imported/encode_pp.def |   1 +
 target/hexagon/imported/ldst.idef     |   3 +
 22 files changed, 1696 insertions(+), 61 deletions(-)
 create mode 100644 target/hexagon/hexswi.h
 create mode 100644 target/hexagon/hexswi.c

-- 
2.34.1

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