Brian Cain <[email protected]> writes: > Add boot-serial-test support for Hexagon architecture using the virt > machine. > > Signed-off-by: Brian Cain <[email protected]> > --- > tests/qtest/boot-serial-test.c | 8 ++++++++ > tests/qtest/meson.build | 2 ++ > 2 files changed, 10 insertions(+) > > diff --git a/tests/qtest/boot-serial-test.c b/tests/qtest/boot-serial-test.c > index bcd0a9c50e7..37fee7a91c4 100644 > --- a/tests/qtest/boot-serial-test.c > +++ b/tests/qtest/boot-serial-test.c > @@ -142,6 +142,13 @@ static const uint8_t kernel_stm32vldiscovery[] = { > 0x04, 0x38, 0x01, 0x40 /* 0x40013804 = USART1 TXD */ > }; > > +static const uint8_t bios_hexagon[] = { > + 0x00, 0x40, 0x00, 0x01, /* immext(#0x10000000) */ > + 0x00, 0xc0, 0x00, 0x78, /* r0 = ##0x10000000 */ > + 0x54, 0xc0, 0x00, 0x3c, /* memb(r0+#0) = #0x54 Write 'T' > */ > + 0xf8, 0xff, 0xff, 0x59 /* jump 0x0 ; Loop back to start > */ > +}; > + > typedef struct testdef { > const char *arch; /* Target architecture */ > const char *machine; /* Name of the machine */ > @@ -194,6 +201,7 @@ static const testdef_t tests[] = { > { "arm", "microbit", "", "T", sizeof(kernel_nrf51), kernel_nrf51 }, > { "arm", "stm32vldiscovery", "", "T", > sizeof(kernel_stm32vldiscovery), kernel_stm32vldiscovery }, > + { "hexagon", "virt", "", "TT", sizeof(bios_hexagon), NULL, bios_hexagon > }, > > { NULL } > }; > diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build > index ba9f59d2f8f..d83cb05cc8c 100644 > --- a/tests/qtest/meson.build > +++ b/tests/qtest/meson.build > @@ -290,6 +290,8 @@ qtests_riscv64 = ['riscv-csr-test'] + \ > config_all_devices.has_key('CONFIG_RISCV_IOMMU') ? > ['iommu-riscv-test'] : []) > > +qtests_hexagon = ['boot-serial-test'] > + > qos_test_ss = ss.source_set() > qos_test_ss.add( > 'ac97-test.c',
Reviewed-by: Fabiano Rosas <[email protected]>
