In preparation of having this helper handle CPU runtime endianness changes, factor the ldn() helper out.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> --- target/riscv/gdbstub.c | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c index 6a5b7a82fd4..be42566bcc8 100644 --- a/target/riscv/gdbstub.c +++ b/target/riscv/gdbstub.c @@ -47,6 +47,11 @@ static const struct TypeSize vec_lanes[] = { { "uint8", "bytes", 8, 'b' }, }; +static uint64_t ldn(CPURISCVState *env, uint8_t *mem_buf, size_t regsz) +{ + return ldn_p(mem_buf, regsz); +} + int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) { RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs); @@ -84,15 +89,15 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) switch (mcc->def->misa_mxl_max) { case MXL_RV32: - tmp = (int32_t)ldl_p(mem_buf); + tmp = (int32_t)ldn(env, mem_buf, 4); length = 4; break; case MXL_RV64: case MXL_RV128: if (env->xl < MXL_RV64) { - tmp = (int32_t)ldq_p(mem_buf); + tmp = (int32_t)ldn(env, mem_buf, 8); } else { - tmp = ldq_p(mem_buf); + tmp = ldn(env, mem_buf, 8); } length = 8; break; @@ -130,7 +135,7 @@ static int riscv_gdb_set_fpu(CPUState *cs, uint8_t *mem_buf, int n) CPURISCVState *env = &cpu->env; if (n < 32) { - env->fpr[n] = ldq_p(mem_buf); /* always 64-bit */ + env->fpr[n] = ldn(env, mem_buf, 8); /* always 64-bit */ return sizeof(uint64_t); } return 0; @@ -162,7 +167,7 @@ static int riscv_gdb_set_vector(CPUState *cs, uint8_t *mem_buf, int n) if (n < 32) { int i; for (i = 0; i < vlenb; i += 8) { - env->vreg[(n * vlenb + i) / 8] = ldq_p(mem_buf + i); + env->vreg[(n * vlenb + i) / 8] = ldn(env, mem_buf + i, 8); } return vlenb; } @@ -194,7 +199,7 @@ static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem_buf, int n) const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8; if (n < CSR_TABLE_SIZE) { - uint64_t val = ldn_p(mem_buf, regsz); + uint64_t val = ldn(env, mem_buf, regsz); int result; result = riscv_csrrw_debug(env, n, NULL, val, -1); @@ -230,8 +235,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n) const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8; #ifndef CONFIG_USER_ONLY CPURISCVState *env = &cpu->env; - - target_ulong new_priv = ldn_p(mem_buf, regsz) & 0x3; + uint64_t new_priv = ldn(env, mem_buf, regsz) & 0x3; bool new_virt = 0; if (new_priv == PRV_RESERVED) { @@ -239,7 +243,7 @@ static int riscv_gdb_set_virtual(CPUState *cs, uint8_t *mem_buf, int n) } if (new_priv != PRV_M) { - new_virt = (ldn_p(mem_buf, regsz) & BIT(2)) >> 2; + new_virt = (ldn(env, mem_buf, regsz) & BIT(2)) >> 2; } if (riscv_has_ext(env, RVH) && new_virt != env->virt_enabled) { -- 2.53.0
