Pre-REL6 microMIPS requires alignment while REL6 microMIPS does not.
Use @default_tcg_memop_mask in gen_ldst_multiple(), it is set to
MO_UNALN for REL6 but MO_ALIGN for pre-REL6.
Fixes: 3c824109da0 ("target-mips: microMIPS ASE support")
Reported-by: Richard Henderson <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
---
target/mips/tcg/micromips_translate.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/mips/tcg/micromips_translate.c.inc
b/target/mips/tcg/micromips_translate.c.inc
index fb107eb91fe..da2419792eb 100644
--- a/target/mips/tcg/micromips_translate.c.inc
+++ b/target/mips/tcg/micromips_translate.c.inc
@@ -693,7 +693,7 @@ static void gen_ldst_multiple(DisasContext *ctx, uint32_t
opc, int reglist,
int base, int16_t offset)
{
TCGv t0, t1;
- MemOp mop = MO_UNALN;
+ MemOp mop = ctx->default_tcg_memop_mask;
MemOpIdx oi;
if (ctx->hflags & MIPS_HFLAG_BMASK) {
--
2.53.0
