On Thu, May 07, 2026 at 02:38:34PM +1000, Nicholas Piggin wrote:
> Ascalon supports Svadu (hardware A/D bit updates).
>
> QEMU makes Svadu and Svade mutually exclusive, remove Svade so
> Ascalon comes up with Svadu working.
Hi Nicholas,
Svadu and Svade aren't mutually exclusive, you can see the expected
behaviors for the pair in the commit message of commit 70d22fd92c3b
("target/riscv: Gate hardware A/D PTE bit updating"). Does the
Ascalon support Svade? If so, then it's probably best to enable both
and leave it to Linux to enable Svadu with SBI FWFT
SBI_FWFT_PTE_AD_HW_UPDATING in order to maximize the amount of
software supported. But, unfortunately Linux doesn't yet support the
checking for and enabling of SBI_FWFT_PTE_AD_HW_UPDATING. We still
need kernel patches for that.
Thanks,
drew
>
> Signed-off-by: Joel Stanley <[email protected]>
> Signed-off-by: Nicholas Piggin <[email protected]>
> Reviewed-by: Alistair Francis <[email protected]>
> ---
> target/riscv/cpu.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 69649462dd..97e3567264 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -3204,7 +3204,6 @@ static const TypeInfo riscv_cpu_type_infos[] = {
> .cfg.ext_ssaia = true,
> .cfg.ext_sscofpmf = true,
> .cfg.ext_sstc = true,
> - .cfg.ext_svade = true,
> .cfg.ext_svinval = true,
> .cfg.ext_svnapot = true,
> .cfg.ext_svpbmt = true,
> --
> 2.53.0
>
>
