On 5/13/26 6:33 PM, Shaju Abraham wrote:
> Add entries for sysregs MIDR_EL1, REVIDR_EL1, AIDR_EL1, ID_AA64PFR0_EL1,
> and ID_AA64ISAR3_EL1 to cpu-sysregs.h.inc.
Can't you reuse
[PATCH v4 03/17] target/arm/cpu-sysregs.h.inc: Update with automatic
generation
and associated python script to automate this. I think it contains all
the additions you bring here + some others.
for
Eric
>
> Co-authored-by: Khushit Shah <[email protected]>
> Signed-off-by: Shaju Abraham <[email protected]>
> ---
> target/arm/cpu-sysregs.h.inc | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/target/arm/cpu-sysregs.h.inc b/target/arm/cpu-sysregs.h.inc
> index 3d1ed40f04..82a83d9d5c 100644
> --- a/target/arm/cpu-sysregs.h.inc
> +++ b/target/arm/cpu-sysregs.h.inc
> @@ -41,3 +41,8 @@ DEF(CLIDR_EL1, 3, 1, 0, 0, 1)
> DEF(ID_AA64ZFR0_EL1, 3, 0, 0, 4, 4)
> DEF(CTR_EL0, 3, 3, 0, 0, 1)
> DEF(DCZID_EL0, 3, 3, 0, 0, 7)
> +DEF(MIDR_EL1, 3, 0, 0, 0, 0)
> +DEF(REVIDR_EL1, 3, 0, 0, 0, 6)
> +DEF(AIDR_EL1, 3, 1, 0, 0, 7)
> +DEF(ID_AA64FPFR0_EL1, 3, 0, 0, 4, 7)
> +DEF(ID_AA64ISAR3_EL1, 3, 0, 0, 6, 3)
